MT41K512M16VRP-107 AAT:P is a TwinDie 1.35V DDR3L SDRAM. It is a high-speed, CMOS dynamic random access memory device internally configured as two 8-bank DDR3L SDRAM. It uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O balls. A single read or write access consists of a single 8n-bit-wide, one-clock-cycle data transfer at the internal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O balls.
- 512Meg x 16 configuration, data rate is 1866MT/s, automotive certified
- Packaging style is 96-ball FBGA, 8mm x 14mm
- Timing (cycle time) is 1.07ns at CL = 13 (DDR3-1866)
- Operating temperature range is -40°C to +105°C, automotive certification
- Supply voltage range is -0.4V to 1.975V, output driver calibration
- Differential bidirectional data strobe, 8n-bit prefetch architecture
- Differential clock inputs (CK, CK#), 8 internal banks, multipurpose register
- Programmable CAS (READ) latency (CL), programmable CAS (WRITE) latency (CWL)
- Selectable BC4 or BL8 on-the-fly (OTF), self refresh mode
- Self refresh temperature (SRT), automatic self refresh (ASR)
Other details
| Brand |
MICRON |
| Part Number |
MT41K512M16VRP-107 AATP |
| Quantity |
Each |
| Technical Data Sheet EN |
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