MICROCHIP KSZ8001L Ethernet Controller, PHY Transceiver, IEEE 802.3u, 1.71 V, 1.89 V, LQFP, 48 Pins

The KSZ8001L is an Integrated 9-port 10/100 Switch with PHY and frame buffer. This device runs in two modes. The first mode is an eight port integrated switch and the second is as a nine port switch with the ninth port available through an MII (Media Independent Interface). Useful configurations include a stand-alone eight port switch as well as an eight port switch with a routing element connected to the extra MII port. The additional port is also useful for a public network interfacing. The KS8999 is designed to reside in an unmanaged design not requiring processor intervention. This is achieved through I/O strapping or EEPROM programming at system reset time. On the media side, it supports 10BaseT, 100BaseTX and 100BaseFX as specified by the IEEE 802.3 committee. Physical signal transmission and reception are enhanced through use of analog circuitry that makes the design more efficient and allows for lower power consumption and smaller chip die size.

• 128kB of SRAM on chip for frame buffering
• 2.0Gbps High performance memory bandwidth
• Wire speed reception and transmission
• Integrated address look-up engine, supports 1K absolute MAC addresses
• Automatic address learning, address aging and address migration
• Supports 802.1p priority and port based priority
• Supports port based VLAN
• Supports 1536byte frame for VLAN tag
• Supports DiffServ priority, 802.1p based priority or port based priority broadcast storm protection
• Proven transceiver technology for UTP and fibre operation
• Supports for UTP or fibre on all 8-ports
• Indicators for link, activity, full/half-duplex and speed
• Full duplex IEEE 802.3x flow control
• Half-duplex back pressure flow control
• Supports MDI/MDI-X auto crossover

Applications

Communications & Networking

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.