- MT62F768M64D4 mobile LPDDR5 SDRAM
- Operating voltage range from 1.05V VDD2/0.5V VDDQ, 768 Meg x 64 configuration
- LPDDR5/LPDDR5X, 4 die count, 234ps WCK cycle time
- Architecture-17.1GB/s maximum bandwidth per channel, single x16 channel/die
- Double-data-rate command/address entry, differential command clocks for high-speed operation
- Command-selectable burst lengths (BL = 16 or 32) in bank group or 16-bank modes
- Background ZQ calibration/command-based ZQ calibration
- Optional link protection (link ECC)
- 441-ball TFBGA package, operating temperature range from -25°C <= TC <= +85°C
- Partial-array self refresh (PASR) and partial-array auto refresh (PAAR) with segment mask
Other details
| Brand |
MICRON |
| Part Number |
MT62F768M64D4EK-023 WTB |
| Quantity |
Each |
| Technical Data Sheet EN |
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