{"title":"FPGA","description":"","products":[{"product_id":"sparkfun-bladerf-x40","title":"SparkFun bladeRF x40","description":"\u003cp\u003eThe bladeRF x40 is an affordable USB 3.0 Software-Defined Radio (SDR) designed to allow students and RF enthusiasts to explore wireless communication, and to provide professionals with a versatile COTS waveform development platform. The bladeRF x40 is a great next step after using an SDR like the \u003ca href=\"https:\/\/www.sparkfun.com\/products\/13001\"\u003eHackRF One\u003c\/a\u003e, especially with the built-in FPGA providing you with more user-defined options.\u003c\/p\u003e \u003cp\u003eOut of the box, the bladeRF can tune from 300MHz to 3.8GHz without the need for extra boards. Through open source software such as GNURadio (live image), the bladeRF can be placed into immediate use. With its flexible hardware and software, the bladeRF can be configured to operate as a custom RF modem, a GSM and LTE picocell, a GPS receiver, an ATSC transmitter or a combination Bluetooth\/WiFi client, without the need for any expansion cards.\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/wPx3deJip1Y\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eIncludes:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e1x bladeRF x40 (40KLE Cyclone 4 FPGA)\u003c\/li\u003e \u003cli\u003e1x USB 3.0 SS cable\u003c\/li\u003e \u003cli\u003e2x SMA cables\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eFull-duplex 40MSPS 12-bit quadrature sampling\u003c\/li\u003e \u003cli\u003eFactory calibrated VCTCXO tuned within 1Hz of 38.4MHz\u003c\/li\u003e \u003cli\u003eRemovable-cap RF shields for increased system sensitivity and isolation\u003c\/li\u003e \u003cli\u003eFlexible clocking architecture for arbitrary sample rates\u003c\/li\u003e \u003cli\u003eGPIO expansion port (GPIO Expansion Board)\u003c\/li\u003e \u003cli\u003eSPI flash allowing for headless operation\u003c\/li\u003e \u003cli\u003eExpanded frequency coverage using XB-200 Transverter Board\u003c\/li\u003e \u003cli\u003eTypical +6dBm TX power\u003c\/li\u003e \u003cli\u003eFully bus-powered USB 3.0 Superspeed SDR\u003c\/li\u003e \u003cli\u003e300MHz–3.8GHz RF frequency range\u003c\/li\u003e \u003cli\u003eIndependent RX\/TX 12-bit 40MSPS quadrature sampling\u003c\/li\u003e \u003cli\u003eCapable of achieving full-duplex 28MHz channels\u003c\/li\u003e \u003cli\u003e16-bit DAC factory-calibrated 38.4MHz +\/-1ppm VCTCXO\u003c\/li\u003e \u003cli\u003eOnboard 200MHz ARM9 with 512KB embedded SRAM (JTAG port available)\u003c\/li\u003e \u003cli\u003eOnboard 40KLE Altera Cyclone 4 E FPGA (JTAG port available)\u003c\/li\u003e \u003cli\u003e2x2 MIMO configurable with SMB cable, expandable up to 4x4\u003c\/li\u003e \u003cli\u003eStable Linux, Windows, Mac and GNURadio software support\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/datasheets\/Wireless\/General\/bladerf.pdf\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.nuand.com\/bladerf_top.dxf\"\u003eMechanical DXF File\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.nuand.com\/support.php\"\u003eDocumentation \u0026amp; Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/nuand\/bladeRF\"\u003eGitHub\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42402323024,"sku":"14041:WRL-14041:spark","price":89440.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/14041-01.jpg?v=1576002826"},{"product_id":"sparkfun-alchitry-ft-element-board","title":"SparkFun Alchitry Ft Element Board","description":"\u003cp\u003eMeet the Alchitry Ft Element Board! Alchitry Elements are expansion boards similar to Arduino shields or Raspberry Pi HATs that work with your \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16527\"\u003eAu\u003c\/a\u003e and \u003ca href=\"https:\/\/www.sparkfun.com\/products\/17514\"\u003eAu+\u003c\/a\u003e FPGA Development Boards. The Ft Element is equipped with four 50-pin board to board connectors on the underside and top of the board that snap to the Alchitry Au and Au(+) boards. It also adds a USB 3.0 200MB\/s high speed interface to your Alchitry board stack via the USB-C connector.\u003c\/p\u003e \u003cp\u003ePlease note that this board is only functional with the higher end \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16527\"\u003eAu\u003c\/a\u003e \u0026amp; \u003ca href=\"https:\/\/www.sparkfun.com\/products\/17514\"\u003eAu+\u003c\/a\u003e FPGA Dev boards that feature the Xilinx Artix 7.\u003c\/p\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eUSB-C connector w\/ 200MB\/s data rate to board to board connectors\u003c\/li\u003e \u003cli\u003eFor use with projects that require data transfer rates greater than standard on board USB to serial 12Mbaud\u003c\/li\u003e \u003cli\u003e200 Mbps* ~ 191 Mbaud* - \u003cem\u003e\u003cstrong\u003eNote\u003c\/strong\u003e: this is not exact and depends on how you are using the Dev board in conjunction with the FT element board.\u003c\/em\u003e\n\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/2\/5\/3\/6\/0\/Alchitry_Ft.pdf\"\u003eAlchitry Ft Element Schematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\/getting-started-with-the-cu\"\u003eGetting Started Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/alchitry-labs\"\u003eAlchitry Labs\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"http:\/\/www.clifford.at\/icestorm\/\"\u003eProject IceStorm\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\"\u003eAlchitry Tutorials\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/y7ydOHxIlgY\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QEQOI75N0Zk\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501714227285,"sku":"17526:DEV-17526:spark","price":5175.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17526-Alchitry_Ft_Element_Board-01.jpg?v=1629000217"},{"product_id":"sparkfun-digilent-usrp-b205mini-i-software-defined-radio-platform","title":"SparkFun Digilent USRP B205mini-i: Software-Defined Radio Platform","description":"\u003cp\u003eDigilent USRP B205mini-i: 1x1 USB Software-Defined Radio Platform is a flexible and compact platform that is ideal for both hobbyist and OEM applications. The board is designed by Ettus Research� and provides a wide frequency range (70MHz to 6GHz) and a user-programmable, industrial-grade Xilinx Spartan-6 XC6SLX150 FPGA. This USRP is a transceiver, meaning that they can both transmit and receive RF signals. The RF front end uses the Analog Devices AD9364 RFIC transceiver with 56MHz of instantaneous bandwidth. The USRP B205mini-i board is bus-powered by a high-speed USB 3.0 connection for streaming data to the host computer. This board also includes connectors for GPIO, JTAG, and synchronization with a 10MHz clock reference or PPS time reference input signal.\u003c\/p\u003e \u003cp\u003eThe USRP B205mini-i board hardware is conveniently accessible through the USRP Hardware Driver (UHD). This UHD provides both a C\/C++ and Python API and offers cross-platform support for multiple industry-standard development environments and frameworks, including RFNoC, GNU, LabVIEW, and Matlab. This hardware ensures no restrictions for the usage of UHD and is also available on Linux, Windows, and Mac OS. The UHD provides the necessary control used to transport user waveform samples to and from USRP hardware as well as control various parameters of the radio. Typical applications include AM\/FM, cellular communication\/GPS\/WiFi, and TV broadcast.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eXilinx Spartan-6 XC6SLX150 FPGA\u003c\/li\u003e \u003cli\u003eAnalog Devices AD9364 RFIC transceiver\u003c\/li\u003e \u003cli\u003eRF specifications: \u003cul\u003e \u003cli\u003eChannels: 1 TX and 1 RX\u003c\/li\u003e \u003cli\u003e70MHz to 6GHz frequency range\u003c\/li\u003e \u003cli\u003eUp to 56MHz instantaneous bandwidth\u003c\/li\u003e \u003cli\u003e-20dBm IIP3 (@ typical NF)\u003c\/li\u003e \u003cli\u003e\u0026gt;10dBm power output\u003c\/li\u003e \u003cli\u003e\u0026lt;8dB receive noise figure\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eConversion performance and clocks: \u003cul\u003e \u003cli\u003e61.44MS\/s ADC sample rate (max.)\u003c\/li\u003e \u003cli\u003e12bits ADC resolution\u003c\/li\u003e \u003cli\u003e61.44MS\/s DAC sample rate (max.)\u003c\/li\u003e \u003cli\u003e12bits DAC resolution\u003c\/li\u003e \u003cli\u003e61.44MS\/s host sample rate (16b)\u003c\/li\u003e \u003cli\u003e±2.0ppm frequency accuracy\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e5V USB power\u003c\/li\u003e \u003cli\u003eSynchronization: \u003cul\u003e \u003cli\u003e10MHz clock reference\u003c\/li\u003e \u003cli\u003ePPS time reference\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e83.3mm x 50.8mm x 8.4mm dimensions\u003c\/li\u003e \u003cli\u003e24.0g weight\u003c\/li\u003e \u003cli\u003e0°C to 45°C operating temperature range\u003c\/li\u003e \u003cli\u003eSoftware: \u003cul\u003e \u003cli\u003eUSRP hardware driver 3.9.2 (or later)\u003c\/li\u003e \u003cli\u003eGNU radio\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501739556949,"sku":"17928:DEV-17928:spark","price":214865.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17928-Digilent_USRP_B205mini-i-_Software-Defined_Radio_Platform.jpg?v=1629000369"},{"product_id":"sparkfun-arria-10-soc-with-2-speed-dual-arm-cortex-a9-480k-le","title":"SparkFun Arria 10 SoC with 2 speed (Dual ARM Cortex A9 + 480K LE)","description":"\u003cp\u003eiWave Systems Intel Arria 10 SoC System on Module is based on the Arria 10 SX family device with an F34 package. The SoM is supplied with 32-bit DDR4 memory support for HPS with ECC and 64-bit DDR4 support for FPGA. A complete selection of IOs and high-speed transceiver blocks are available on the SOM board to board connectors.\u003c\/p\u003e \u003cp\u003eThe Arria 10 SoC System On Modules are designed for equipment applications such as test and measurement, control and intelligence, diagnostic medical imaging, wireless infrastructure, computer-storage, and broadcast-distribution.\u003c\/p\u003e \u003cp\u003eThe iW-G24M-CU2F-4E002G-S008G-LEI is an SX480 Arria 10 SoC with 2 speed (Dual ARM Cortex A9 + 480K LE), 2GB HPS DDR4, 4GB FPGA DDR4, 8GB MicroSD (Linux OS), and extended grade.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eArria10 SoC\/FPGA: \u003cul\u003e \u003cli\u003eDual Core, Cortex-A9 CPU @ 1.5GHz\u003c\/li\u003e \u003cli\u003eSX480 (10AS048) FPGA Fabric\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eMemory: \u003cul\u003e \u003cli\u003e2GB DDR4 with ECC for HPS\u003c\/li\u003e \u003cli\u003e4GB DDR4 for FPGA\u003c\/li\u003e \u003cli\u003eMicro SD for HPS boot\u003c\/li\u003e \u003cli\u003e8GB eMMC Flash for HPS boot (Optional)\u003c\/li\u003e \u003cli\u003eQSPI Flash for FPGA\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCommunication: \u003cul\u003e \u003cli\u003e10\/100\/100 Ethernet PHY For HPS\u003c\/li\u003e \u003cli\u003eUSB2.0 transceiver for HPS\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003ePower Supply: \u003cul\u003e \u003cli\u003e5V through SOM B2B connector 2\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eTemperature support: \u003cul\u003e \u003cli\u003e-40°C to +85°C Industrial\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eDual 240 Pin Board to Board Connector\u003c\/li\u003e \u003cli\u003eArria10 SoC HPS IO interfaces \u003cul\u003e \u003cli\u003eGigabit Ethernet x 1 Port\u003c\/li\u003e \u003cli\u003eUSB 2.0 OTG x 1 Port\u003c\/li\u003e \u003cli\u003eSD (4bit) x 1 Port (optional)\u003c\/li\u003e \u003cli\u003eSPI x 1 Port\u003c\/li\u003e \u003cli\u003eI\u003csup\u003e2\u003c\/sup\u003eC x 1 Port\u003c\/li\u003e \u003cli\u003eHPS Dedicated UART Console\u003c\/li\u003e \u003cli\u003eGPIOs-14 Nos\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eArria10 SoC FPGA IO interfaces \u003cul\u003e \u003cli\u003e24 high -speed transceivers\u003c\/li\u003e \u003cli\u003e48\/96 LVDS from BANK 3B \u0026amp; 3C\u003c\/li\u003e \u003cli\u003e93 SE from BANK 2A \u0026amp; 3A\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eHPS\/FPGA JTAG, FPGA AS headers\u003c\/li\u003e \u003cli\u003eLinux 4.9.78 OS Support\u003c\/li\u003e \u003cli\u003e95mm x 75mm Form Factor\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.mouser.com\/datasheet\/2\/1038\/arria-10-soc-som-R2.0-1771113.pdf\"\u003eDatasheet\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501746634837,"sku":"17023:DEV-17023:spark","price":297380.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17023-Arria_10_SoC_with_2_speed__Dual_ARM_Cortex_A9___480K_LE.jpg?v=1628999979"},{"product_id":"sparkfun-arria-10-soc-1-4ghz-1gb-ram-for-hps-256mbit-qspi-flash-8gb-microsd","title":"SparkFun Arria 10 SoC @1.4GHz , 1GB RAM for HPS, 256Mbit QSPI Flash, 8GB MicroSD","description":"\u003cp\u003eiWave Systems Arria 10 SoC FPGA Development Platform consists of the Arria10 SoC\/FPGA SOM and a high-performance carrier card. The Arria10 SoC\/FPGA Development Kit allows users to develop rapid prototypes, validating the highspeed interfaces and I\/Os. The SOM is equipped with 4GB DDR4 RAM (64bit) from FPGA and 2GB DDR4 SDRAM (32bit) with ECC from HPS (expandable).\u003c\/p\u003e \u003cp\u003eThe Arria10 SoC\/FPGA Development Kit carrier board supports a wide range of highspeed interfaces such as FMC (HPC) Connectors, SATA, SFP+, and PCIe connectors. These allow the validation of Arria10 FPGA high-speed transceivers and other on-board connectors to verify Arria10 SoC (HPS) interfaces.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eHigh-Speed Interfaces: \u003cul\u003e \u003cli\u003eFMC connector x2\u003c\/li\u003e \u003cli\u003ePCIe x 1 Lane Connector x1\u003c\/li\u003e \u003cli\u003eSATA x 1 Lane Connector x1\u003c\/li\u003e \u003cli\u003eSFP+ connector X1\u003c\/li\u003e \u003cli\u003eSDI Video IN BNC Jack\u003c\/li\u003e \u003cli\u003eSDI Video OUT BNC Jack\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCommunication Features: \u003cul\u003e \u003cli\u003eHPS Gigabit Ethernet through RJ45 Magjack\u003c\/li\u003e \u003cli\u003eOTG USB 2.0 through Micro AB connector x1\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAudio and Video: \u003cul\u003e \u003cli\u003eDisplay Port X1\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eFPGA Standard I\/O Interfaces: \u003cul\u003e \u003cli\u003e12pin PMOD Connector x2\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eHPS Standard I\/O Interfaces: \u003cul\u003e \u003cli\u003eHPS IO Header\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eDebug Interfaces: \u003cul\u003e \u003cli\u003eUART to USB converter with USB MicroAB Connector\u003c\/li\u003e \u003cli\u003eJTAG Connector\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e12V Power input jack power supply\u003c\/li\u003e \u003cli\u003e140mm X 130mm Form Factor\u003c\/li\u003e \u003cli\u003eREACH \u0026amp; RoHS Compliant\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.mouser.com\/datasheet\/2\/1038\/g24d-arria10-devkit-FMC-brochure-1816067.pdf\"\u003eDatasheet\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501746667605,"sku":"17026:DEV-17026:spark","price":297380.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17026-Arria_10_SoC__1.4GHz___1GB_RAM_for_HPS__256Mbit_QSPI_Flash__8GB_MicroSD.jpg?v=1628999982"},{"product_id":"sparkfun-arria-10-soc-with-3-speed-dual-arm-cortex-a9-270k-le","title":"SparkFun Arria 10 SoC with 3 speed (Dual ARM Cortex A9 + 270K LE)","description":"\u003cp\u003eiWave Systems Intel Arria 10 SoC System on Module is based on the Arria 10 SX family device with an F34 package. The SoM is supplied with 32-bit DDR4 memory support for HPS with ECC and 64-bit DDR4 support for FPGA. A complete selection of IOs and high-speed transceiver blocks are available on the SOM board to board connectors.\u003c\/p\u003e \u003cp\u003eThe Arria 10 SoC System On Modules are designed for equipment applications such as test and measurement, control and intelligence, diagnostic medical imaging, wireless infrastructure, computer-storage, and broadcast-distribution.\u003c\/p\u003e \u003cp\u003eThe iW-G24M-CU2F-4E001G-S008G-LIG is an SX270 Arria 10 SoC with 3 speed (Dual ARM Cortex A9 + 270K LE), 1GB HPS DDR4, 8GB MicroSD (Linux OS), and industrial grade.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eArria10 SoC\/FPGA: \u003cul\u003e \u003cli\u003eDual Core, Cortex-A9 CPU @ 1.5GHz\u003c\/li\u003e \u003cli\u003eSX480 (10AS048) FPGA Fabric\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eMemory: \u003cul\u003e \u003cli\u003e2GB DDR4 with ECC for HPS\u003c\/li\u003e \u003cli\u003e4GB DDR4 for FPGA\u003c\/li\u003e \u003cli\u003eMicro SD for HPS boot\u003c\/li\u003e \u003cli\u003e8GB eMMC Flash for HPS boot (Optional)\u003c\/li\u003e \u003cli\u003eQSPI Flash for FPGA\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCommunication: \u003cul\u003e \u003cli\u003e10\/100\/100 Ethernet PHY For HPS\u003c\/li\u003e \u003cli\u003eUSB2.0 transceiver for HPS\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003ePower Supply: \u003cul\u003e \u003cli\u003e5V through SOM B2B connector 2\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eTemperature support: \u003cul\u003e \u003cli\u003e-40°C to +85°C Industrial\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eDual 240 Pin Board to Board Connector\u003c\/li\u003e \u003cli\u003eArria10 SoC HPS IO interfaces \u003cul\u003e \u003cli\u003eGigabit Ethernet x 1 Port\u003c\/li\u003e \u003cli\u003eUSB 2.0 OTG x 1 Port\u003c\/li\u003e \u003cli\u003eSD (4bit) x 1 Port (optional)\u003c\/li\u003e \u003cli\u003eSPI x 1 Port\u003c\/li\u003e \u003cli\u003eI\u003csup\u003e2\u003c\/sup\u003eC x 1 Port\u003c\/li\u003e \u003cli\u003eHPS Dedicated UART Console\u003c\/li\u003e \u003cli\u003eGPIOs-14 Nos\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eArria10 SoC FPGA IO interfaces \u003cul\u003e \u003cli\u003e24 high -speed transceivers\u003c\/li\u003e \u003cli\u003e48\/96 LVDS from BANK 3B \u0026amp; 3C\u003c\/li\u003e \u003cli\u003e93 SE from BANK 2A \u0026amp; 3A\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eHPS\/FPGA JTAG, FPGA AS headers\u003c\/li\u003e \u003cli\u003eLinux 4.9.78 OS Support\u003c\/li\u003e \u003cli\u003e95mm x 75mm Form Factor\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.mouser.com\/datasheet\/2\/1038\/arria-10-soc-som-R2.0-1771113.pdf\"\u003eDatasheet\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501746733141,"sku":"17022:DEV-17022:spark","price":206040.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17022-Arria_10_SoC_with_3_speed__Dual_ARM_Cortex_A9___270K_LE.jpg?v=1628999977"},{"product_id":"sparkfun-alchitry-au-fpga-development-board-xilinx-artix-8","title":"SparkFun Alchitry Au+ FPGA Development Board (Xilinx Artix 7)","description":"\u003cp\u003eThe Alchitry Au+ is the \"gold\" standard for FPGA development boards and it's possibly one of the strongest boards of its type on the market. The Au+ substitutes a more robust \u0026amp; scalable FPGA chip (Xilinx XC7A100T) that allows for more complex application circuits. The number of Configurable logic blocks (LABs\/CLBs), Logic Elements, and total RAM bits are all nearly 3x that of the standard Au; see \"Features\" for more details.\u003c\/p\u003e \u003cp\u003eFPGAs, or Field-Programmable Gate Arrays, are an advanced development board type for engineers and hobbyists alike to experience the next step in programming with electronics. The Au+ continues the trend of more affordable and increasingly powerful FPGA boards arriving each year. This board will allow your project to grow beyond the typical starting points for FPGAs. Finally, now that this board is built by SparkFun, we added a Qwiic connector for easy I\u003csup\u003e2\u003c\/sup\u003eC integration!\u003c\/p\u003e \u003cp\u003eThe Alchitry Au+ features a Xilinx Artix 7 XC7A100T FPGA with over 100k logic cells and 256MB of DDR3 RAM. The Au+ offers 102 3.3V logic level IO pins, 20 of which can be switched to 1.8V; Nine differential analog inputs; Eight general purpose LEDs; a 100MHz on-board clock that can be manipulated internally by the FPGA; a USB-C connector to configure and power the board; and a USB to serial interface for data transfer. To make getting started even easier, all Alchitry boards have full \u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid\u003c\/a\u003e support, a built in library of useful components to use in your project, and a debugger!\u003c\/p\u003e \u003cp\u003eBy adding stackable expansion boards similar to shields or HATs called \"Elements,\" the Alchitry Au is able to expand its own hardware capabilities by adding prototyping spaces, buttons, LEDs, and more!\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003cem\u003eThe SparkFun Qwiic Connect System is an ecosystem of I\u003csup\u003e2\u003c\/sup\u003eC sensors, actuators, shields and cables that make prototyping faster and less prone to error. All Qwiic-enabled boards use a common 1mm pitch, 4-pin JST connector. This reduces the amount of required PCB space, and polarized connections mean you can�t hook it up wrong.\u003c\/em\u003e\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cp\u003e\u003cem\u003eWhat's different about the Au+?\u003c\/em\u003e\u003c\/p\u003e \u003cp\u003eThe Au+ uses a similar Xilinx Artix-7 FPGA IC (same total I\/O), but with a more rubust and over 3x scalable architecture that allow for more complex application circuits.\u003c\/p\u003e \u003cul\u003e \u003cli\u003eNumber of LABs\/CLBs- 7925 (vs. 2600 on the Au) - Logic Array Block\/Configurable logic blocks -\u003c\/li\u003e \u003cli\u003eNumber of Logic Elements\/Cells - 101440 (vs. 33,208 on the Au)\u003c\/li\u003e \u003cli\u003eTotal RAM Bits - 4,976,640\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eFeatures\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eArtix 7 XC7A100T - 101,440 logic cells\u003c\/li\u003e \u003cli\u003e256MB DDR3 RAM\u003c\/li\u003e \u003cli\u003e102 IO pins (3.3V logic level, 20 of then can be switched to 1.8V for LVDS)\u003c\/li\u003e \u003cli\u003eNine differential analog inputs (One dedicated, Eight mixed with digital IO)\u003c\/li\u003e \u003cli\u003eUSB-C to configure and power the board\u003c\/li\u003e \u003cli\u003eEight general purpose LEDs\u003c\/li\u003e \u003cli\u003eOne button (typically used as a reset)\u003c\/li\u003e \u003cli\u003e100MHz on-board clock (can be multiplied internally by the FPGA)\u003c\/li\u003e \u003cli\u003ePowered with 5V through USB-C port, 0.1\" holes, or headers\u003c\/li\u003e \u003cli\u003eUSB to serial interface for data transfer (up to 12Mbaud)\u003c\/li\u003e \u003cli\u003eQwiic Connector\u003c\/li\u003e \u003cli\u003eDimensions of 65mm x 45mm\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/1\/3\/d\/d\/b\/alchitry_gold_plus_schematic.pdf\"\u003eSchematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\/getting-started-with-the-au\"\u003eGetting Started Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/alchitry-labs\"\u003eAlchitry Labs\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid FPGA Tutorial\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\"\u003eAlchitry Tutorials\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/qwiic\"\u003eQwiic Info Page\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eExamples:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/first-fpga-project---getting-fancy-with-pwm\"\u003eFirst FPGA Project - Getting Fancy with PWM\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/external-io-and-metastability\"\u003eExternal IO and Metastability\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/y7ydOHxIlgY\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QEQOI75N0Zk\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501747290197,"sku":"17514:DEV-17514:spark","price":52460.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17514-Alchitry_Au__FPGA_Development_Board__Xilinx_Artix_7_-01.jpg?v=1629000205"},{"product_id":"sparkfun-alchitry-au-fpga-development-board-xilinx-artix-9","title":"SparkFun Alchitry Au FPGA Development Board (Xilinx Artix 7)","description":"\u003cp\u003eThe Alchitry Au is the \"gold\" standard for FPGA development boards and it's possibly one of the strongest boards of its type on the market. FPGAs, or Field-Programmable Gate Arrays, are an advanced development board type for engineers and hobbyists alike to experience the next step in programming with electronics. The Au continues the trend of more affordable and increasingly powerful FPGA boards arriving each year. This board is a fantastic starting point into the world of FPGAs and the heart of your next project. Finally, now that this board is built by SparkFun, we added a Qwiic connector for easy I\u003csup\u003e2\u003c\/sup\u003eC integration!\u003c\/p\u003e \u003cp\u003eThe Alchitry Au features a Xilinx Artix 7 XC7A35T-1C FPGA with over 33,000 logic cells and 256MB of DDR3 RAM. The Au offers 102 3.3V logic level IO pins, 20 of which can be switched to 1.8V; Nine differential analog inputs; Eight general purpose LEDs; a 100MHz on-board clock that can be manipulated internally by the FPGA; a USB-C connector to configure and power the board; and a USB to serial interface for data transfer. To make getting started even easier, all Alchitry boards have full \u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid\u003c\/a\u003e support, a built in library of useful components to use in your project, and a debugger!\u003c\/p\u003e \u003cp\u003eBy adding stackable expansion boards similar to shields or HATs called \"Elements,\" the Alchitry Au is able to expand its own hardware capabilities by adding prototyping spaces, buttons, LEDs, and more!\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003cem\u003eThe SparkFun Qwiic Connect System is an ecosystem of I\u003csup\u003e2\u003c\/sup\u003eC sensors, actuators, shields and cables that make prototyping faster and less prone to error. All Qwiic-enabled boards use a common 1mm pitch, 4-pin JST connector. This reduces the amount of required PCB space, and polarized connections mean you can�t hook it up wrong.\u003c\/em\u003e\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eArtix 7 XC7A35T-1C - 33,280 logic cells\u003c\/li\u003e \u003cli\u003e256MB DDR3 RAM\u003c\/li\u003e \u003cli\u003e102 IO pins (3.3V logic level, 20 of then can be switched to 1.8V for LVDS)\u003c\/li\u003e \u003cli\u003eNine differential analog inputs (One dedicated, Eight mixed with digital IO)\u003c\/li\u003e \u003cli\u003eUSB-C to configure and power the board\u003c\/li\u003e \u003cli\u003eEight general purpose LEDs\u003c\/li\u003e \u003cli\u003eOne button (typically used as a reset)\u003c\/li\u003e \u003cli\u003e100MHz on-board clock (can be multiplied internally by the FPGA)\u003c\/li\u003e \u003cli\u003ePowered with 5V through USB-C port, 0.1\" holes, or headers\u003c\/li\u003e \u003cli\u003eUSB to serial interface for data transfer (up to 12Mbaud)\u003c\/li\u003e \u003cli\u003eQwiic Connector\u003c\/li\u003e \u003cli\u003eDimensions of 65mm x 45mm\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/b\/6\/2\/f\/b\/alchitry_au_sch_update.pdf\"\u003eAlchitry Au Schematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\/getting-started-with-the-au\"\u003eGetting Started Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/alchitry-labs\"\u003eAlchitry Labs\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid FPGA Tutorial\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\"\u003eAlchitry Tutorials\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eExamples:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/first-fpga-project---getting-fancy-with-pwm\"\u003eFirst FPGA Project - Getting Fancy with PWM\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/external-io-and-metastability\"\u003eExternal IO and Metastability\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QEQOI75N0Zk\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501749485653,"sku":"16527:DEV-16527:spark","price":16625.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/16527-Alchitry_Au_FPGA_Development_Board__Xilinx_Artix_7_-03.jpg?v=1628999838"},{"product_id":"sparkfun-quicklogic-thing-plus-eos-s3","title":"SparkFun QuickLogic Thing Plus - EOS S3","description":"\u003cp\u003eThe SparkFun QuickLogic Thing Plus \u003ca href=\"https:\/\/www.quicklogic.com\/products\/eos-s3\/\"\u003eEOS™ S3\u003c\/a\u003e, is a small form factor system ideal for enabling the next generation of low-power Machine Learning (ML) devices. The QuickLogic Thing Plus is powered by QuickLogic�s EOS S3, the first eFPGA-enabled Arm Cortex©-M4F MCU to be fully supported with Zephyr RTOS and FreeRTOS. Unlike other development boards which are based on proprietary hardware and software tools, the QuickLogic Things Plus is based on 100% open source hardware, compatible with the Feather form factor, and is built around 100% open source software (with support for FreeRTOS, Zephyr, nMingen, Docker, and SymbiFlow).\u003c\/p\u003e \u003cp\u003eBetween the onboard LiPo battery connector and charging circuitry, wake-on-sound PDM microphone, and low-power, three-axis accelerometer, this Thing Plus board is ideal for wearable, voice, gesture sensing applications. The strong firmware support for the microphone and accelerator make it easy to move sensor data into the embedded FPGA. From there, you can use SensiML, TensorFlow Lite, or other tools to train and run embedded machine learning algorithms specific to your application. The board also includes a Qwiic connector to quickly interface with an ecosystem of 150+ I\u003csup\u003e2\u003c\/sup\u003eC-compatible boards such as sensors, RFID readers, displays, keypads, and relays.\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003cem\u003eThe \u003ca href=\"https:\/\/www.sparkfun.com\/qwiic\"\u003eSparkFun Qwiic Connect System\u003c\/a\u003e is an ecosystem of I\u003csup\u003e2\u003c\/sup\u003eC sensors, actuators, shields and cables that make prototyping faster and less prone to error. All Qwiic-enabled boards use a common 1mm pitch, 4-pin JST connector. This reduces the amount of required PCB space, and polarized connections mean you can�t hook it up wrong.\u003c\/em\u003e\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/1791\" class=\"btn btn-default\"\u003eGet Started With the QuickLogic Thing Plus Hookup Guide\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\n\u003cstrong\u003eEOS S3 MCU + eFPGA SoC\u003c\/strong\u003e \u003cul\u003e \u003cli\u003e\n\u003cstrong\u003eArm® Cortex®-M4F Microcontroller\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eup to 80 MHz operating frequency\u003c\/li\u003e \u003cli\u003eup to 512 KB SRAM\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eEmbedded FPGA (eFPGA)\u003c\/strong\u003e \u003cul\u003e \u003cli\u003e2400 effective logic cells\u003c\/li\u003e \u003cli\u003e64 Kb RAM\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eThing Plus Form Factor\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eBreadboard-compatible 0.1\" (2.54 mm) pitch headers\u003c\/li\u003e \u003cli\u003e2.75\" x 0.9\" (70 mm x 22.9 mm) footprint\u003c\/li\u003e \u003cli\u003eAll 20 Feather-defined GPIO + 14 additional GPIO\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eInterfaces\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eSWD programming connector for use with USB-TTL converter\u003c\/li\u003e \u003cli\u003eUSB data signals are tied to eFPGA programmable logic\u003c\/li\u003e \u003cli\u003eUART available via I\/O headers\u003c\/li\u003e \u003cli\u003eI\u003csup\u003e2\u003c\/sup\u003eC available via I\/O headers, and Qwiic Connector\u003c\/li\u003e \u003cli\u003eSPI\u003c\/li\u003e \u003cli\u003eI\u003csup\u003e2\u003c\/sup\u003eS\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eStorage\u003c\/strong\u003e \u003cul\u003e \u003cli\u003e16 Mbit SPI NOR flash - GigaDevice GD25Q16CEIGR\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eSensors\u003c\/strong\u003e \u003cul\u003e \u003cli\u003e3-Axis 12-bit Accelerometer - STMicro LIS2DH12TR\u003c\/li\u003e \u003cli\u003eDigital pulse density modulation (PDM) microphone with Wake-on-Sound (WoS) feature - Vesper VM3011-U1\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eUser Interfaces\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eRGB LED\u003c\/li\u003e \u003cli\u003eUser pushbutton\u003c\/li\u003e \u003cli\u003eReset pushbutton\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003ePower\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eUSB Type-C connector (regulated to 3.3 V)\u003c\/li\u003e \u003cli\u003eSingle Cell LiPo battery\u003c\/li\u003e \u003cli\u003eOn-board charging circuitry - Microchip MCP73831\/2\u003c\/li\u003e \u003cli\u003eStandard LiPo JST connector\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eSoftware\u003c\/strong\u003e \u003cul\u003e \u003cli\u003e\n\u003cstrong\u003eMachine Learning\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eTensorFlow Lite\u003c\/li\u003e \u003cli\u003eSensiML\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eReal-time Operating Systems\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eZephyr RTOS\u003c\/li\u003e \u003cli\u003eFreeRTOS\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\n\u003cstrong\u003eFPGA Tools\u003c\/strong\u003e \u003cul\u003e \u003cli\u003eSymbiFlow\u003c\/li\u003e \u003cli\u003eRenode\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/7\/0\/b\/4\/0\/SparkFun_QuickLogic_ThingPlus_EOS-S3_R8_Schematic.pdf\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/5\/f\/8\/1\/d\/SparkFun_QuickLogic_ThingPlus_EOS-S3_V2_1.brd\"\u003eCadence Board File\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/learn_tutorials\/1\/7\/9\/1\/QuickLogic_Thing_Plus_EOS_S3_Board_Dimensions.jpg\"\u003eBoard Dimensions\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/learn_tutorials\/1\/7\/9\/1\/QuickLogic_Thing_Plus_EOS_S3_v1a.pdf\"\u003eGraphical Datasheet\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/1791\"\u003eHookup Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003eQuickLogic EOS E3 \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/7\/a\/c\/c\/e\/QL-EOS-S3-Ultra-Low-Power-multicore-MCU-Datasheet-v3_3d.pdf\"\u003eDatasheet\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/f\/2\/a\/c\/5\/QL-S3-Technical-Reference-Manual-revisionv1.1a.pdf\"\u003eTechnical Reference Manual\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/b\/9\/6\/b\/4\/QL-TWS-Whitepaper-August-14.pdf\"\u003eWhitepaper\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eSoftware \u003cul\u003e \u003cli\u003eMachine Learning \u003cul\u003e \u003cli\u003eTensorFlow Lite\u003c\/li\u003e \u003cli\u003eSensiML\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eReal-time Operating Systems \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/QuickLogic-Corp\/zephyr\/\"\u003eZephry RTOS (QuickLogic Fork)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/QuickLogic-Corp\/qorc-sdk\"\u003eQORC SDK with FreeRTOS\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eFPGA Tools \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/QuickLogic-Corp\/quicklogic-fpga-toolchain\/\"\u003eSymbiFlow\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/qwiic\"\u003eQwiic Information Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/sparkfun\/QuickLogic_QTPlus\"\u003eGitHub Hardware Repo\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/sFxGwaUxhlE\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/OyP3ulPGeZc\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501751451733,"sku":"17273:DEV-17273:spark","price":6750.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17273-SparkFun_QuickLogic_Thing_Plus_-_EOS_S3-01.jpg?v=1629000075"},{"product_id":"sparkfun-alchitry-br-prototype-element-board-1","title":"SparkFun Alchitry Br Prototype Element Board","description":"\u003cp\u003eThe Alchitry Br Element Board is a prototyping periphery for the \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16527\"\u003eAu\u003c\/a\u003e or \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16526\"\u003eCu\u003c\/a\u003e FPGA Development Boards. The Br breaks out all the signals on the four headers running from your Au or Cu and has a large prototyping area with a 0.1\" pin grid for custom circuits.\u003c\/p\u003e \u003cp\u003eAlchitry Elements are expansion boards similar to shields for an Arduino or HATs for a Raspberry Pi but these are meant for your Au and Cu FPGA Development Boards. This Element is equipped with four connectors on top and four on the bottom for maximum stackability that snap to an Au or Cu board. There are also \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16581\"\u003efemale headers (sold separately)\u003c\/a\u003e available that can be soldered into the prototyping area turning the Br Element into a breadboard so you can test out new circuits without making them a permanent resident!\u003c\/p\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/9\/0\/7\/3\/1\/alchitry_br_sch_update.pdf\"\u003eAlchitry Br Schematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\/getting-started-with-the-au\"\u003eGetting Started Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/alchitry-labs\"\u003eAlchitry Labs\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid FPGA Tutorial\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\"\u003eAlchitry Tutorials\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eExamples:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/first-fpga-project---getting-fancy-with-pwm\"\u003eFirst FPGA Project - Getting Fancy with PWM\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/external-io-and-metastability\"\u003eExternal IO and Metastability\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QEQOI75N0Zk\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e\u003cbr\u003eAll product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":39501756235861,"sku":"16524:DEV-16524:spark","price":2415.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/16524-Alchitry_Br_Prototype_Element_Board-01.jpg?v=1628999826"},{"product_id":"sparkfun-alchitry-cu-fpga-development-board-lattice-ice40-hx","title":"SparkFun Alchitry Cu FPGA Development Board (Lattice iCE40 HX)","description":"\u003cp\u003eIf you are not needing a lot of power to start your FPGA adventure, or are looking for a more economical option, the Alchitry Cu FPGA Development Board might be the perfect option for you! The Alchitry Cu is a \"lighter\" FPGA version than the \u003ca href=\"https:\/\/www.sparkfun.com\/products\/15847\"\u003eAlchitry Au\u003c\/a\u003e but still offers something completely unique. FPGAs, or Field-Programmable Gate Arrays, are an advanced development board type for engineers and hobbyists alike to experience the next step in programming with electronics. The Cu truly exemplifies the trend of more affordable and increasingly powerful FPGA boards arriving each year. This board is a fantastic starting point into the world of FPGAs and the heart of your next project. Finally, now that this board is built by SparkFun, we added a Qwiic connector for easy I\u003csup\u003e2\u003c\/sup\u003eC integration!\u003c\/p\u003e \u003cp\u003eThe Alchitry Cu uses the Lattice iCE40 HX FPGA with 7680 logic cells and is supported by the open source tool chain \u003ca href=\"http:\/\/www.clifford.at\/icestorm\/\"\u003eProject IceStorm\u003c\/a\u003e. The Cu possesses 79 IO pins with eight general purpose LEDs; a 100MHz on-board clock that can be manipulated internally by the FPGA; a USB-C connector to configure and power the board; and a USB to serial interface for data transfer.\u003c\/p\u003e \u003cp\u003eBy adding stackable expansion boards similar to shields or HATs called \"Elements,\" the Alchitry Cu is able to expand its own hardware capabilities by adding prototyping spaces, buttons, LEDs, and more!\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003cem\u003eThe SparkFun Qwiic Connect System is an ecosystem of I\u003csup\u003e2\u003c\/sup\u003eC sensors, actuators, shields and cables that make prototyping faster and less prone to error. All Qwiic-enabled boards use a common 1mm pitch, 4-pin JST connector. This reduces the amount of required PCB space, and polarized connections mean you canââ�¬â�¢t hook it up wrong.\u003c\/em\u003e\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eLattice iCE40-HX8K FPGA - 7680 logic elements\u003c\/li\u003e \u003cli\u003e79 IO pins (3.3V logic level)\u003c\/li\u003e \u003cli\u003eUSB-C to configure and power the board\u003c\/li\u003e \u003cli\u003eEight general purpose LEDs\u003c\/li\u003e \u003cli\u003eOne button (typically used as a reset)\u003c\/li\u003e \u003cli\u003e100MHz on-board clock (can be multiplied internally by the FPGA)\u003c\/li\u003e \u003cli\u003ePowered with 5V through USB-C port, 0.1\" holes, or headers\u003c\/li\u003e \u003cli\u003eUSB to serial interface for data transfer (up to 12Mbaud)\u003c\/li\u003e \u003cli\u003eQwiic Connector\u003c\/li\u003e \u003cli\u003eDimensions of 65mm x 45mm\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/2\/6\/e\/5\/e\/alchitry_cu_sch_update.pdf\"\u003eAlchitry Cu Schematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\/getting-started-with-the-cu\"\u003eGetting Started Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/alchitry-labs\"\u003eAlchitry Labs\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"http:\/\/www.clifford.at\/icestorm\/\"\u003eProject IceStorm\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\"\u003eAlchitry Tutorials\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eExamples:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/first-fpga-project---getting-fancy-with-pwm\"\u003eFirst FPGA Project - Getting Fancy with PWM\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/external-io-and-metastability\"\u003eExternal IO and Metastability\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QEQOI75N0Zk\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40054672982101,"sku":"16526:DEV-16526:spark","price":7625.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/16526-Alchitry_Cu_FPGA_Development_Board__Lattice_iCE40_HX_-03.jpg?v=1651340661"},{"product_id":"sparkfun-micromod-alorium-sno-m2-processor","title":"SparkFun MicroMod Alorium Sno M2 Processor","description":"\u003cp\u003eThe SparkFun MicroMod Alorium Sno M2 Processor features the SnÃ�Â� System on Module (SoM) adapted to the MicroMod M.2 processor form factor. SnÃ�Â�'s FPGA provides a reconfigurable hardware platform that hosts an 8-bit AVR instruction set, compatible with the ATmega328, making SnÃ�Â� fully compatible with the Arduino IDE. SnÃ�Â� SoM has a compact footprint, making it ideal for space-constrained applications and an obvious addition to our MicroMod form factor for prototyping.\u003c\/p\u003e \u003cp\u003eAlorium Technology provides a library of custom logic called Xcelerator Blocks (XBs) through the Arduino IDE that accelerates specific functionalities that are slow, problematic, or even impossible for an 8-bit microcontroller. This library includes XBs such as Servo Control, Quadrature, Floating Point Math, NeoPixel, and Enhanced Analog-to-Digital Converter. Alorium also notes a XB roadmap where future XBs will be implemented based on feedback from early adopters and new potential customers.\u003c\/p\u003e \u003cp\u003eFor advanced users, there is a JTAG footprint on the board allowing a JTAG programmer to talk to the FPGA directly. The microcontroller core has been designed to be easily extendable, and Alorium Technology has developed a support model for users who want to create their own XBs and interface to the on-chip microcontroller.\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003cem\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/micromod\"\u003eMicroMod\u003c\/a\u003e is a modular interface ecosystem that connects a microcontroller ââ�¬Å�processor boardââ�¬Â� to various ââ�¬Å�carrier boardââ�¬Â� peripherals. Utilizing the M.2 standard, the MicroMod standard is designed to easily swap out processors on the fly. Pair a specialized carrier board for the project you need with your choice of compatible processor!\u003c\/em\u003e\u003c\/p\u003e \u003chr\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/2287\" class=\"btn btn-default\"\u003eGet Started with the MicroMod Alorium Sno M2 Processor Guide\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eAlorium Sno Processor General Features\u003c\/strong\u003e:\u003c\/p\u003e \u003cul\u003e \u003cli\u003eIntelÃ�® MAXÃ�® 10 FPGA (16K LEs) \u003cul\u003e \u003cli\u003e10M16SAU169C8G\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eProgrammable with Arduino IDE\u003c\/li\u003e \u003cli\u003eEmbedded 8-bit AVR instruction set compatible microcontroller (ATmega328 compatible)\u003c\/li\u003e \u003cli\u003eConfigurable with custom Xcelerator Blocks (XBs) on the FPGA\u003c\/li\u003e \u003cli\u003eProgramming interface: USB Serial\u003c\/li\u003e \u003cli\u003eOperating voltage: 3.3V\u003c\/li\u003e \u003cli\u003eClock Speed 16\/32MHz\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDigital I\/O\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e32 Dedicated Digital Pins\u003c\/li\u003e \u003cli\u003e6 Shared Digital with Analog Pins\u003c\/li\u003e \u003cli\u003e3.3V Inputs\u003c\/li\u003e \u003cli\u003e3.3V Outputs\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eAnalog Inputs\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e6 Analog Pins\u003c\/li\u003e \u003cli\u003e3.3V Analog Reference\u003c\/li\u003e \u003cli\u003eADC Performance: 1MHz\u003c\/li\u003e \u003cli\u003eResolution: 12-bit sustained\u003c\/li\u003e \u003cli\u003eSample Rate: 254k samples\/second\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eMemory\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eProgram FLASH 32KB\u003c\/li\u003e \u003cli\u003eData memory SRAM: 2KB\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eSpecific Peripherals available on MicroMod Alorium Sno M2 Processor\u003c\/strong\u003e:\u003c\/p\u003e \u003cul\u003e \u003cli\u003eJTAG footprint for direct FPGA programming\u003c\/li\u003e \u003cli\u003eM.2 keyed interface for integration with SparkFun MicroMod carrier boards\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eMicroMod Alorium Sno Processor Documentation:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/5\/c\/6\/9\/0\/18030_MicroModAloriumSnoPB_Schematic.pdf\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/7\/f\/e\/7\/9\/18030_MicroModAloriumSnoPB_EagleFiles.zip\"\u003eEagle Files\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/0\/1\/9\/c\/1\/18030_MicroModAloriumSnoPB_BoardOutline_Cropped.png\"\u003eBoard Outline\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/2287\"\u003eHookup Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/sparkfun\/MicroMod_Sno_Processor_Board\"\u003eGitHub Hardware Repo\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eMicroMod Documentation:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/learn_tutorials\/1\/2\/0\/6\/SparkFun_MicroMod_Interface_v1.0_-_Pinout.pdf\"\u003eSparkFun MicroMod Interface v1.0 - Pinout\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/learn_tutorials\/1\/2\/0\/6\/SparkFun_MicroMod_Interface_v1.0_-_Pin_Descriptions.pdf\"\u003eSparkFun MicroMod Interface v1.0 - Pin Descriptions\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/getting-started-with-micromod\"\u003eGetting Started with MicroMod\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/designing-with-micromod\"\u003eDesigning with MicroMod\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/micromod\"\u003eMicroMod Info Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.sparkfun.com\/viewforum.php?f=180\"\u003eMicroMod Forums\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\n\u003ca href=\"https:\/\/github.com\/sparkfun\/SparkFun-Eagle-Libraries\"\u003eSparkFun Eagle Libraries\u003c\/a\u003e contains example footprints for the M.2 connector and SMD standoff\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/9\/c\/e\/b\/6\/MicroMod_M.2_Connector_Datasheet_TE_2199230-4.pdf\"\u003eM.2 MicroMod Connector Datasheet\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/f\/d\/2\/b\/e\/MicroMod_Reflowable_Standoff.pdf\"\u003eMicroMod Reflowable Standoff Datasheet\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eAlorium Sno Documentation:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/aloriumtech.com\/sno\/\"\u003eAlorium Technology OEM Module Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/aloriumtech.com\/documents\/Sno_Product_Brief.pdf\"\u003eSnÃ�Â� Product Brief\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/SYiLQFMpgXU\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/ZB82AwtkgEU\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40054673080405,"sku":"18030:DEV-18030:spark","price":7350.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/18030-SparkFun_MicroMod_Alorium_Sno_Processor_Board-01a.jpg?v=1651340670"},{"product_id":"sparkfun-bladerf-2-0-micro-xa5","title":"SparkFun bladeRF 2.0 micro xA5","description":"\u003cp\u003eThe bladeRF 2.0 micro xA5 is the next generation Software Defined Radio (SDR) offering a frequency range of 47MHz to 6GHz, 61.44MHz sampling rate, and 2Ã�â��2 MIMO streaming. Packed into a small form factor, the bladeRF 2.0 micro was designed for high performance as well as mobile applications. Through libbladeRF the bladeRF 2.0 micro is compatible with GNURadio, GQRX, SDR-Radio, SDR#, gr-fosphor, SoapySDR, and more on Windows, Linux and macOS.\u003c\/p\u003e \u003cp\u003eThe RF shield cap protects sensitive RF components from Electromagnetic Interference (EMI) and provides additional thermal dissipation, allowing the bladeRF 2.0 micro to operate in challenging environments.\u003c\/p\u003e \u003cp\u003eAll of the RF SMA ports are capable of providing power over bias-tee circuitry to wideband amplifiers and pre-amps. Power to bias-tee peripherals is fully software controllable, providing maximal operational flexibility. Currently, the official bias-tee peripherals include the BT-100, a wideband power amplifier for TX, and the BT-200, a wideband low noise amplifier for RX.\u003c\/p\u003e \u003cp\u003eAt the core of the bladeRF 2.0 micro is the latest generation Cyclone V FPGA from Intel (formerly Altera). The xA5 features a 77KLE FPGA of which about 60KLE are available and user programmable. An advanced clocking architecture allows the bladeRF 2.0 micro to receive and provide its 38.4MHz fundamental clock from and to other devices. Additionally, an on-board PLL allows the bladeRF 2.0 micro to tame its VCTCXO to a 10MHz reference signal. The xA5 features a highly accurate and stable oscillator. The on-board DAC sets the frequency trim of the oscillator to a factory calibrated value.\u003c\/p\u003e \u003cp\u003eThe Power Distribution Network (PDN) of the bladeRF 2.0 micro features an intricate combination of low noise and high efficiency switch mode and linear power regulators. While the bladeRF 2.0 micro can be run solely from USB bus power, an external power source can be supplied to ensure maximal linear performance of bias-tee peripherals. The PDN features an auto selection and hold-over circuitry to optimize power draw between USB bus and external DC power.\u003c\/p\u003e \u003cp\u003eThe bladeRF 2.0 micro can run in headless without needing to be connected to a PC or SBC. The on-board flash is large enough to hold any size FPGA image for the xA5.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eIncludes:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e1x bladeRF xA5 (77KLE Cyclone V FPGA)\u003c\/li\u003e \u003cli\u003e1x USB 3.0 SS cable\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eRF PERFORMANCE:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e47 MHz to 6 GHz frequency range\u003c\/li\u003e \u003cli\u003e2x2 MIMO, 61.44 MHz sampling rate\u003c\/li\u003e \u003cli\u003e56 MHz filtered bandwidth (IBW)\u003c\/li\u003e \u003cli\u003eAutomatic gain control (AGC)\u003c\/li\u003e \u003cli\u003eAutomatic IQ and DC offset correction\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eUSB 3.0 SUPERSPEED SUPPORT:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e200 MHz ARM926EJ-S processor\u003c\/li\u003e \u003cli\u003eFully bus-powered over USB 3.0\u003c\/li\u003e \u003cli\u003eExternal power 5V DC barrel with automatic switchover\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eALTERA CYCLONE V FPGA:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e49 kLE and 301 kLE variants available for custom signal processing and hardware accelerators\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eFACTORY-CALIBRATED VCTCXO:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eTaming supported via 12-bit DAC or ADF4002 PLL\u003c\/li\u003e \u003cli\u003eFactory calibration of 38.4 MHz clock\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/Nuand\/bladeRF\/wiki#Getting_Started\"\u003eGetting Started Guide on bladeRF wiki\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/a\/7\/9\/c\/5\/Schematic_bladeRF_2.0_micro_xA5_19039_bladeRF-micro.pdf\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.nuand.com\/bladerf-2-0-micro\/\"\u003eProduct Brief\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.nuand.com\/support\/\"\u003eSupport Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40054704767061,"sku":"19039:WRL-19039:spark","price":99760.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/19039-bladeRF_2.0_micro_xA5-01.jpg?v=1651344472"},{"product_id":"sparkfun-icebreaker-fpga","title":"SparkFun iCEBreaker FPGA","description":"\u003cp\u003eAre you ready to venture into the brave new world of digital logic design? The iCEBreaker FPGA board is specifically designed for you. It works out of the box with the latest open source FPGA development tools and next-generation open CPU architectures. The iCEBreaker is easily expandable through its Pmod connectors, so you can make use of a large selection of third-party Pmod modules.\u003c\/p\u003e \u003cp\u003eThe iCEBreaker FPGA board has three standard Pmod connectors, which makes for a wide range of expansion options since Pmod is a standard followed by several hardware manufacturers. This gives you access to a massive library of modules â�� no matter what your project, youâ��re sure to find a Pmod for it. The iCEBreaker FPGA board comes with a tabbed, breakaway Pmod with three pushbuttons and five LEDs. You can use the breakaway Pmod to explore FPGAs right away, without any soldering, or you can break it off and use the Pmod connector for another Pmod.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eLattice iCE40UP5k FPGA \u003cul\u003e \u003cli\u003e5280 logic cells (4-LUT + Carry + FF)\u003c\/li\u003e \u003cli\u003e120 Kbit dual-port block RAM\u003c\/li\u003e \u003cli\u003e1 Mbit (128 KByte) single-port RAM\u003c\/li\u003e \u003cli\u003ePLL, 2 x SPI, 2 x I2C hard IPs\u003c\/li\u003e \u003cli\u003eTwo internal oscillators (10 kHz and 48 MHz) for simple designs\u003c\/li\u003e \u003cli\u003eEight DSP multiplier blocks for signal processing such as audio synthesis and even software defined radio\u003c\/li\u003e \u003cli\u003eLow power consumption ideal for battery-powered applications\u003c\/li\u003e \u003cli\u003eThree 24 mA drive and 3 x hard IP PWM (can drive RGB LEDs and small motors)\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003ePlentiful, fast storage \u003cul\u003e \u003cli\u003e128 Mbit (16 MB) quad SPI double data rate (QSPI-DDR) flash\u003c\/li\u003e \u003cli\u003eExample: can stream video to LED matrix\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eLots of I\/O \u003cul\u003e \u003cli\u003eThree pins (header) for RGB LED\u003c\/li\u003e \u003cli\u003eTwo on-board LEDs\u003c\/li\u003e \u003cli\u003eOne UART, RX pin and TX pin accessible via virtual (USB) serial port\u003c\/li\u003e \u003cli\u003eOne pushbutton\u003c\/li\u003e \u003cli\u003eTwo available Pmod connectors (16 x pins total)\u003c\/li\u003e \u003cli\u003eOne breakaway Pmod (8 x pins)\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003ePre-wired, breakaway Pmod module \u003cul\u003e \u003cli\u003eInput and output user accessible and usable in your own hardware design\u003c\/li\u003e \u003cli\u003eFive LEDs in a star pattern\u003c\/li\u003e \u003cli\u003eThree push buttons\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCapable enough to host CPU softcores \u003cul\u003e \u003cli\u003epicorv32\u003c\/li\u003e \u003cli\u003epicosoc\u003c\/li\u003e \u003cli\u003eRISC-V and others\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eOn-board FPGA programmer and USB-to-serial adapter \u003cul\u003e \u003cli\u003eCompatible with IceStorm iceprog tool\u003c\/li\u003e \u003cli\u003eEasy, driverless connection as a serial device to host computer\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eUSB high speed \u003cul\u003e \u003cli\u003eOn-board FT2232 USB chip\u003c\/li\u003e \u003cli\u003eUp to 480 Mbit\/s interface to host computer\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/github.com\/icebreaker-fpga\/icebreaker\"\u003eGitHub\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331927715925,"sku":"16440:DEV-16440:spark","price":14125.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/16440_-_iCEBreaker_FPGA_2.jpg?v=1663614390"},{"product_id":"sparkfun-alchitry-au-fpga-kit","title":"SparkFun Alchitry Au FPGA Kit","description":"\u003cdiv class=\"alert alert-info\" role=\"alert\"\u003e Due to supply chain constraints we do not expect to have more stock until March of 2023 (or later) \u003c\/div\u003e \u003cp\u003eIf you have ever wanted to get into FPGAs but never knew where to begin, the Alchitry Au FPGA kit from SparkFun provides you with the boards you need to get started! Included in this kit is the Alchitry Au, Alchitry Io Element, Alchitry Br Prototype, and a 4-pack of female headers. The only thing you'll need to supply are a USB-C cable to power and program the Au and Qwiic cables to add I\u003csup\u003e2\u003c\/sup\u003eC accessory integration.\u003c\/p\u003e \u003cp\u003eThe Alchitry Au, included in this kit, features a Xilinx Artix 7 XC7A35T-1C FPGA with over 33,000 logic cells and 256MB of DDR3 RAM. The Au offers 102 3.3V logic level IO pins, 20 of which can be switched to 1.8V; Nine differential analog inputs; Eight general purpose LEDs; a 100MHz on-board clock that can be manipulated internally by the FPGA; a USB-C connector to configure and power the board; and a USB to serial interface for data transfer. To make getting started even easier, all Alchitry boards have full \u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid\u003c\/a\u003e support, a built in library of useful components to use in your project, and a debugger!\u003c\/p\u003e \u003cp\u003eThanks to the included Io and Br Element boards also included in this kit, you will also have access to 7-segment LEDs, five momentary push buttons, 24 basic LEDs, and 24 DIP switches, a the broken out header pins, and a large prototyping area!\u003c\/p\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eIncludes:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e1x \u003ca href=\"https:\/\/www.sparkfun.com\/products\/15847\"\u003eAlchitry Au FPGA Development Board\u003c\/a\u003e\n\u003c\/li\u003e \u003cli\u003e1x \u003ca href=\"https:\/\/www.sparkfun.com\/products\/17278\"\u003eAlchitry Io Element Board\u003c\/a\u003e\n\u003c\/li\u003e \u003cli\u003e1x \u003ca href=\"https:\/\/www.sparkfun.com\/products\/15850\"\u003eAlchitry Br Prototype Element Board\u003c\/a\u003e\n\u003c\/li\u003e \u003cli\u003e1x \u003ca href=\"https:\/\/www.sparkfun.com\/products\/15874\"\u003eAlchitry Br Female Header Set\u003c\/a\u003e\n\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/b\/6\/2\/f\/b\/alchitry_au_sch_update.pdf\"\u003eAlchitry Au Schematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\/getting-started-with-the-au\"\u003eGetting Started Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/alchitry-labs\"\u003eAlchitry Labs\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid FPGA Tutorial\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\"\u003eAlchitry Tutorials\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eExamples:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/first-fpga-project---getting-fancy-with-pwm\"\u003eFirst FPGA Project - Getting Fancy with PWM\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/external-io-and-metastability\"\u003eExternal IO and Metastability\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QsBv78W4JyA\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331927846997,"sku":"16497:KIT-16497:spark","price":22020.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/16497-Alchitry_Au_FPGA_Kit-01.jpg?v=1663614408"},{"product_id":"sparkfun-alchitry-io-element-board","title":"SparkFun Alchitry Io Element Board","description":"\u003cdiv class=\"alert alert-danger\" role=\"alert\"\u003e Once we run out of stock of this board we are out. There is a new version of this board with DEV-17278. \u003c\/div\u003e \u003cp\u003eThe Alchitry Io Element Board is the perfect way to get your feet wet with digital design. The Io features four 7-segment LEDs, five momentary push buttons, 24 basic LEDs, and 24 DIP switches that all lend themselves to fantastic beginner tutorials that will walk you through all the basics of FPGAs.\u003c\/p\u003e \u003cp\u003eAlchitry Elements are expansion boards similar to shields for an Arduino or HATs for a Raspberry Pi but these are meant for your \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16527\"\u003eAu\u003c\/a\u003e and \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16526\"\u003eCu\u003c\/a\u003e FPGA Development Boards. This Element is equipped with four connectors on the underside of the board that snap to an Au or Cu board. Be aware that the Io does not feature any connection points on the top of the board so you won't be able to stack any additional Elements on top of it.\u003c\/p\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e4x 7-segment LED digits\u003c\/li\u003e \u003cli\u003e5x momentary push buttons\u003c\/li\u003e \u003cli\u003e24x LEDs\u003c\/li\u003e \u003cli\u003e24x DIP switches\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/4\/0\/4\/5\/7\/alchitry_io_sch_update.pdf\"\u003eAlchitry Io Schematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\/getting-started-with-the-au\"\u003eGetting Started Guide\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/alchitry-labs\"\u003eAlchitry Labs\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/pages\/lucid-fpga-tutorials\"\u003eLucid FPGA Tutorial\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/alchitry.com\/blogs\/tutorials\"\u003eAlchitry Tutorials\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eExamples:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/first-fpga-project---getting-fancy-with-pwm\"\u003eFirst FPGA Project - Getting Fancy with PWM\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/external-io-and-metastability\"\u003eExternal IO and Metastability\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QEQOI75N0Zk\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331927945301,"sku":"16525:DEV-16525:spark","price":2870.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/16525-Alchitry_Io_Element_Board-01_e7cd1232-9fee-4602-9d19-ab66b1ed869d.jpg?v=1663614417"},{"product_id":"sparkfun-arria-10-soc-1-4ghz-2gb-ram-for-hps-4gb-fpga-ram-256mbit-qspi-flash-8gb-microsd","title":"SparkFun Arria 10 SoC @1.4GHz , 2GB RAM for HPS, 4GB FPGA RAM, 256Mbit QSPI Flash, 8GB MicroSD","description":"\u003cp\u003eiWave Systems Arria 10 SoC FPGA Development Platform consists of the Arria10 SoC\/FPGA SOM and a high-performance carrier card. The Arria10 SoC\/FPGA Development Kit allows users to develop rapid prototypes, validating the highspeed interfaces and I\/Os. The SOM is equipped with 4GB DDR4 RAM (64bit) from FPGA and 2GB DDR4 SDRAM (32bit) with ECC from HPS (expandable).\u003c\/p\u003e \u003cp\u003eThe Arria10 SoC\/FPGA Development Kit carrier board supports a wide range of highspeed interfaces such as FMC (HPC) Connectors, SATA, SFP+, and PCIe connectors. These allow the validation of Arria10 FPGA high-speed transceivers and other on-board connectors to verify Arria10 SoC (HPS) interfaces.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eHigh-Speed Interfaces: \u003cul\u003e \u003cli\u003eFMC connector x2\u003c\/li\u003e \u003cli\u003ePCIe x 1 Lane Connector x1\u003c\/li\u003e \u003cli\u003eSATA x 1 Lane Connector x1\u003c\/li\u003e \u003cli\u003eSFP+ connector X1\u003c\/li\u003e \u003cli\u003eSDI Video IN BNC Jack\u003c\/li\u003e \u003cli\u003eSDI Video OUT BNC Jack\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCommunication Features: \u003cul\u003e \u003cli\u003eHPS Gigabit Ethernet through RJ45 Magjack\u003c\/li\u003e \u003cli\u003eOTG USB 2.0 through Micro AB connector x1\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAudio and Video: \u003cul\u003e \u003cli\u003eDisplay Port X1\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eFPGA Standard I\/O Interfaces: \u003cul\u003e \u003cli\u003e12pin PMOD Connector x2\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eHPS Standard I\/O Interfaces: \u003cul\u003e \u003cli\u003eHPS IO Header\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eDebug Interfaces: \u003cul\u003e \u003cli\u003eUART to USB converter with USB MicroAB Connector\u003c\/li\u003e \u003cli\u003eJTAG Connector\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e12V Power input jack power supply\u003c\/li\u003e \u003cli\u003e140mm X 130mm Form Factor\u003c\/li\u003e \u003cli\u003eREACH \u0026amp; RoHS Compliant\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.mouser.com\/datasheet\/2\/1038\/g24d-arria10-devkit-FMC-brochure-1816067.pdf\"\u003eDatasheet\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331936890965,"sku":"17025:DEV-17025:spark","price":594770.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17025-Arria_10_SoC__1.4GHz___2GB_RAM_for_HPS__4GB_FPGA_RAM__256Mbit_QSPI_Flash__8GB_MicroSD.jpg?v=1663614699"},{"product_id":"sparkfun-arria-10-soc-1-4ghz-2gb-ram-for-hps-4gb-fpga-ram-256mbit-qspi-flash-8gb-microsd-1","title":"SparkFun Arria 10 SoC @1.4GHz , 2GB RAM for HPS, 4GB FPGA RAM, 256Mbit QSPI Flash, 8GB MicroSD","description":"\u003cp\u003eiWave Systems Arria 10 SoC FPGA Development Platform consists of the Arria10 SoC\/FPGA SOM and a high-performance carrier card. The Arria10 SoC\/FPGA Development Kit allows users to develop rapid prototypes, validating the highspeed interfaces and I\/Os. The SOM is equipped with 4GB DDR4 RAM (64bit) from FPGA and 2GB DDR4 SDRAM (32bit) with ECC from HPS (expandable).\u003c\/p\u003e \u003cp\u003eThe Arria10 SoC\/FPGA Development Kit carrier board supports a wide range of highspeed interfaces such as FMC (HPC) Connectors, SATA, SFP+, and PCIe connectors. These allow the validation of Arria10 FPGA high-speed transceivers and other on-board connectors to verify Arria10 SoC (HPS) interfaces.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eHigh-Speed Interfaces: \u003cul\u003e \u003cli\u003eFMC connector x2\u003c\/li\u003e \u003cli\u003ePCIe x 1 Lane Connector x1\u003c\/li\u003e \u003cli\u003eSATA x 1 Lane Connector x1\u003c\/li\u003e \u003cli\u003eSFP+ connector X1\u003c\/li\u003e \u003cli\u003eSDI Video IN BNC Jack\u003c\/li\u003e \u003cli\u003eSDI Video OUT BNC Jack\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCommunication Features: \u003cul\u003e \u003cli\u003eHPS Gigabit Ethernet through RJ45 Magjack\u003c\/li\u003e \u003cli\u003eOTG USB 2.0 through Micro AB connector x1\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAudio and Video: \u003cul\u003e \u003cli\u003eDisplay Port X1\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eFPGA Standard I\/O Interfaces: \u003cul\u003e \u003cli\u003e12pin PMOD Connector x2\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eHPS Standard I\/O Interfaces: \u003cul\u003e \u003cli\u003eHPS IO Header\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eDebug Interfaces: \u003cul\u003e \u003cli\u003eUART to USB converter with USB MicroAB Connector\u003c\/li\u003e \u003cli\u003eJTAG Connector\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003e12V Power input jack power supply\u003c\/li\u003e \u003cli\u003e140mm X 130mm Form Factor\u003c\/li\u003e \u003cli\u003eREACH \u0026amp; RoHS Compliant\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.mouser.com\/datasheet\/2\/1038\/g24d-arria10-devkit-FMC-brochure-1816067.pdf\"\u003eDatasheet\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331936923733,"sku":"17027:DEV-17027:spark","price":416335.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17027-Arria_10_SoC__1.4GHz___2GB_RAM_for_HPS__4GB_FPGA_RAM__256Mbit_QSPI_Flash__8GB_MicroSD.jpg?v=1663614701"},{"product_id":"sparkfun-evotray-m51-breakout-board","title":"SparkFun EvoTray M51 Breakout Board","description":"\u003cp\u003eAlorium Technology EvoTray M51 Breakout Board is the next step in the evolution of our FPGA-enhanced embedded microcontroller modules. This board features the 32-bit SAMD51 microcontroller along with an Intel MAX 10 FPGA. The Evotray breakout board conforms to the Feather specification for primary pinout, connectivity, and additional key features. These features include feather footprint, programmable with Arduino, and designed for CircuitPython.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e32-bit SAMD51 microcontroller along with an Intel MAX 10 FPGA\u003c\/li\u003e \u003cli\u003eFeather footprint\u003c\/li\u003e \u003cli\u003eProgrammable with Arduino\u003c\/li\u003e \u003cli\u003eDesigned for CircuitPython\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331938201685,"sku":"17131:DEV-17131:spark","price":1345.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17131-EvoTray_M51_Breakout_Board.jpg?v=1663614776"},{"product_id":"sparkfun-evo-m51-compute-module","title":"SparkFun Evo M51 Compute Module","description":"\u003cp\u003eAlorium Evo M51 Compute Module combines an Intel MAX 10 FPGA with an Atmel SAMD51 Cortex-M4 MCU on an Adafruit Feather compatible board. This module includes two dedicated analog I\/Os, four analog out\/digital I\/Os, 15 digital I\/Os, and 34 castellated digital I\/Os. It also includes a Qwiic connector for easy integration with other projects. The module is programmable with Arduino and supports the Circuit Python programming language. Typical applications for this module include IoT edge analytics, motion and motor control, and measurement and test equipment.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eIntel MAX 10 FPGA\u003c\/li\u003e \u003cli\u003eAtmel SAMD51 \u003cul\u003e \u003cli\u003e32-bit ARM Cortex-M4 microcontroller\u003c\/li\u003e \u003cli\u003e512KB Flash\/192KB RAM\u003c\/li\u003e \u003cli\u003e2MB external Flash\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eQwiic compatible\u003c\/li\u003e \u003cli\u003e2 dedicated analog I\/O\u003c\/li\u003e \u003cli\u003e4 analog out\/digital I\/O\u003c\/li\u003e \u003cli\u003e15 digital I\/O\u003c\/li\u003e \u003cli\u003e34 castellated digital I\/O\u003c\/li\u003e \u003cli\u003eProgrammable with Arduino\u003c\/li\u003e \u003cli\u003eDesigned to support Circuit Python\u003c\/li\u003e \u003cli\u003eFeather footprint\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331938234453,"sku":"17132:DEV-17132:spark","price":21400.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17132-Evo_M51_Compute_Module.jpg?v=1663614777"},{"product_id":"sparkfun-alchitry-io-element-board-1","title":"SparkFun Alchitry Io Element Board","description":"\u003cp\u003eThe Alchitry Io Element Board is the perfect way to get your feet wet with digital design. The Io features four 7-segment LEDs, five momentary push buttons, 24 basic LEDs, and 24 DIP switches that all lend themselves to fantastic beginner tutorials that will walk you through all the basics of FPGAs.\u003c\/p\u003e \u003cp\u003eAlchitry Elements are expansion boards similar to shields for an Arduino or HATs for a Raspberry Pi but these are meant for your \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16527\"\u003eAu\u003c\/a\u003e and \u003ca href=\"https:\/\/www.sparkfun.com\/products\/16526\"\u003eCu\u003c\/a\u003e FPGA Development Boards. This Element is equipped with four connectors on the underside of the board that snap to an Au or Cu board. Be aware that the Io does not feature any connection points on the top of the board so you won't be able to stack any additional Elements on top of it.\u003c\/p\u003e \u003cp\u003e\u003c\/p\u003e\u003cdiv class=\"center-block text-center\"\u003e \u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/tags\/fpga\" class=\"btn btn-default\"\u003eGet Started with our Learning FPGA Tutorials\u003c\/a\u003e \u003c\/div\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cp\u003e\u003cem\u003eOn this most recent revision (v2) external pull up capabilities for the R12 resistor were removed\u003c\/em\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e4x 7-segment LED digits\u003c\/li\u003e \u003cli\u003e5x momentary push buttons\u003c\/li\u003e \u003cli\u003e24x LEDs\u003c\/li\u003e \u003cli\u003e24x DIP switches\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eDocuments:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/0\/2\/9\/8\/a\/alchitry_io_v2.pdf\"\u003eAlchitry Io Schematic (PDF)\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/how-does-an-fpga-work\"\u003eHow Does an FPGA Work?\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/programming-an-fpga\"\u003eProgramming an FPGA\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/news\/1203\"\u003eSo You Want to Learn FPGAs...\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/www.sparkfun.com\/fpga\"\u003eFPGA Resource Page\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/forum.alchitry.com\/\"\u003eAlchitry Forums\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eExamples:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/first-fpga-project---getting-fancy-with-pwm\"\u003eFirst FPGA Project - Getting Fancy with PWM\u003c\/a\u003e\u003c\/li\u003e \u003cli\u003e\u003ca href=\"https:\/\/learn.sparkfun.com\/tutorials\/external-io-and-metastability\"\u003eExternal IO and Metastability\u003c\/a\u003e\u003c\/li\u003e \u003c\/ul\u003e \u003cp\u003e\u003cstrong\u003eVideos\u003c\/strong\u003e\u003c\/p\u003e \u003cdiv class=\"flex-video-wrap clearfix\"\u003e \u003cdiv class=\"flex-video widescreen img\"\u003e \u003ciframe src=\"https:\/\/www.youtube.com\/embed\/QEQOI75N0Zk\/?autohide=1\u0026amp;border=0\u0026amp;wmode=opaque\u0026amp;enablejsapi=1\" frameborder=\"0\" allowfullscreen width=\"560\" height=\"315\"\u003e\u003c\/iframe\u003e \u003c\/div\u003e \u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331940331605,"sku":"17278:DEV-17278:spark","price":3850.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/17278-Alchitry_Io_Element_Board-01.jpg?v=1663614868"},{"product_id":"sparkfun-snickerdoodle-black-connectors-down","title":"SparkFun Snickerdoodle Black (Connectors Down)","description":"\u003cp\u003ekrtklâ��s Snickerdoodle Black system-on-module (SoM) is a Zynq-based computer module with dual-band Wi-Fi, BLE, 1GB RAM, 16MB flash, 180 I\/O, an SD card cage, and is the size of a business card. Built on a Xilinx® Zynqâ�¢-7020 system-on-chip (SoC) and a Texas Instruments WiLinkâ�¢ 8 wireless module, Snickerdoodle is designed to make high-performance, power-efficient computing and artificial intelligence (AI) at the network edge practical, affordable, and scalable.\u003c\/p\u003e \u003cp\u003eThe 2.0\" x 3.5\" (50.8mm x 88.9mm) board offers a Zynq SoC with two 866MHz Arm® Cortex®-A9 cores and a 1.3M gate Xilinx Artix®-7 field-programmable gate array (FPGA), dual-band Wi-Fi and BLUETOOTH® Low Energy connectivity, 1GByte of LPDDR2 RAM, 125 reconfigurable FPGA inputs\/outputs (I\/O), and 55 additional I\/O pins. Out of the box, Snickerdoodle supports Ubuntu Linux, Python, PYNQ, C\/C++, and bare metal. Every Snickerdoodle black includes an adhesive-backed copper heat sink.\u003c\/p\u003e \u003cp\u003eSnickerdoodle Black is offered in two variants for design flexibility: The Connectors Down variant (DEV-18098) features bottom-mounted headers, while the Connectors Up variant (DEV-18100) features top-mounted headers.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eSoC \u003cul\u003e \u003cli\u003eXilinx Zynq-7020 (XC7Z020-3CLG400E) \u003cul\u003e \u003cli\u003e866MHz 32-bit Dual-Core ARM Cortex-A9 \u003cul\u003e \u003cli\u003e640kB Cache\u003c\/li\u003e \u003cli\u003e2x 128-bit NEON Coprocessors\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eArtix-7 FPGA \u003cul\u003e \u003cli\u003e85K logic cells\u003c\/li\u003e \u003cli\u003e1.3M ASIC gates\u003c\/li\u003e \u003cli\u003e53,200 LUT-6s\u003c\/li\u003e \u003cli\u003e220 DSP slices\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eMemory \u003cul\u003e \u003cli\u003e1GB LPDDR2 SDRAM\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eStorage \u003cul\u003e \u003cli\u003e16MB XIP NOR Flash\u003c\/li\u003e \u003cli\u003eUp to 200GB SDIO NAND via Captive MicroSD Card Cage\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eUser I\/O \u003cul\u003e \u003cli\u003e180 I\/O pins (270 total pins, including grounds) \u003cul\u003e \u003cli\u003e125 reconfigurable FPGA I\/O\u003c\/li\u003e \u003cli\u003e55 additional I\/O (including 33x GPIO, 4x I2S Audio, 14x I2C, 1x ADC, 2x DAC)\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCommunications \u003cul\u003e \u003cli\u003eDual-Band 150Mbps 2Ã�2 MIMO 2.4GHz\/5GHz 802.11n Wi-Fi\u003c\/li\u003e \u003cli\u003eBluetooth Low Energy\u003c\/li\u003e \u003cli\u003eDual-Band chip antenna, switched U.FL ports\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eSerial Interfaces \u003cul\u003e \u003cli\u003e2x Gigabit Ethernet\u003c\/li\u003e \u003cli\u003e2x CAN\u003c\/li\u003e \u003cli\u003e2x I2C\u003c\/li\u003e \u003cli\u003eSPI\u003c\/li\u003e \u003cli\u003eUART\u003c\/li\u003e \u003cli\u003eUSB 2.0 High-Speed\u003c\/li\u003e \u003cli\u003eMicroUSB Console\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAnalog Interfaces \u003cul\u003e \u003cli\u003e2x 1MSPS 12-bit ADCs w\/16 Channel Multiplexer\u003c\/li\u003e \u003cli\u003e2x 1MSPS 12-bit DACs\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAdditional Interfaces, Peripherals \u003cul\u003e \u003cli\u003e5x LEDs\u003c\/li\u003e \u003cli\u003e2x Pushbuttons\u003c\/li\u003e \u003cli\u003eSecure Cryptographic Key\/Certificate Storage\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eMechanical \u003cul\u003e \u003cli\u003e2.0\" x 3.5\" (88.9mm x 50.8mm)\u003c\/li\u003e \u003cli\u003eCustom copper, adhesive-backed, pin-fin heat sink\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003ePower \u003cul\u003e \u003cli\u003e5V via MicroUSB or 3.7V to 17V via Power Pins\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eOperating Temperature \u003cul\u003e \u003cli\u003e0º to +80°C (+32° to +176°F)\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eSoftware Support \u003cul\u003e \u003cli\u003eUbuntu Linux\u003c\/li\u003e \u003cli\u003ePYNQ\u003c\/li\u003e \u003cli\u003ePython, C\/C++, Java, LISP\u003c\/li\u003e \u003cli\u003eBare metal\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331947376725,"sku":"18098:DEV-18098:spark","price":44110.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/18098-Snickerdoodle_Black__Connectors_Down.jpg?v=1663615287"},{"product_id":"sparkfun-pismasher-single-board-computer","title":"SparkFun piSmasher Single-board Computer","description":"\u003cp\u003ekrtkl piSmasher Single-board Computer is a snickerdoodle baseboard for audio\/video processing, networking, edge AI, and general computing applications. It includes dual, FPGA-connected Gigabit Ethernet interfaces with PHY support for Time-Sensitive Networking (TSN), and simultaneous HDMI video input and output at up to WUXGA (1920x1200p) at 60Hz and 8-channel, 32-bit\/192kHz HDMI audio input and output.\u003c\/p\u003e \u003cp\u003eAdditionally, piSmasher has four High-Speed USB 2.0 Type-A Host receptacles and a dedicated 96kHz Stereo Audio Codec with color-coded 3.5 mm jacks for line-in, line-out, and headset (stereo audio, mono microphone), and provides access to 25 of snickerdoodleâ��s reconfigurable FPGA I\/O. The 3.5\" Ã� 5.66\" (88.9mm Ã� 143.8mm) board also has an I2C identification and configuration EEPROM, 14-pin Xilinx JTAG header, DC power jack, and four adhesive-backed locking PCB supports.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eVideo Input \u003cul\u003e \u003cli\u003eHDMI Type A receptacle\u003c\/li\u003e \u003cli\u003eUp to WUXGA (1920 x 1200p) at 60Hz\u003c\/li\u003e \u003cli\u003e8-channel, 32-bit\/192kHz HDMI audio\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eVideo Output \u003cul\u003e \u003cli\u003eHDMI Type A receptacle\u003c\/li\u003e \u003cli\u003eUp to WUXGA (1920 x 1200p) at 60Hz\u003c\/li\u003e \u003cli\u003e8-channel, 32-bit\/192kHz HDMI audio\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAudio Line Input \u003cul\u003e \u003cli\u003e3.5mm stereo audio jack with dedicated 96kHz stereo audio codec\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAudio Line Output \u003cul\u003e \u003cli\u003e3.5mm stereo audio jack with dedicated 96kHz stereo audio codec\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAudio Headset \u003cul\u003e \u003cli\u003e3.5mm audio jack (stereo audio, mono microphone) with dedicated 96kHz stereo audio codec\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eNetwork Interfaces \u003cul\u003e \u003cli\u003e2x FPGA-connected RJ45 1000Base-T Gigabit Ethernet jacks\u003c\/li\u003e \u003cli\u003ePHY support for Time-Sensitive Networking (TSN)\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAdditional Interfaces \u003cul\u003e \u003cli\u003e4x USB 2.0 Hi-Speed Standard-A host receptacles\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eUser I\/O \u003cul\u003e \u003cli\u003e25 reconfigurable FPGA I\/O pins\u003c\/li\u003e \u003cli\u003e14 power and I2C pins\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eProgramming Interfaces \u003cul\u003e \u003cli\u003e14-pin 2mm Xilinx JTAG Header\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAdditional Interfaces, Peripherals \u003cul\u003e \u003cli\u003eSecure Cryptographic Key\/Certificate Storage\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003ePower \u003cul\u003e \u003cli\u003e12V via 2.5mm x 5.5mm DC Barrel Jack\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eMechanical \u003cul\u003e \u003cli\u003e3.5x5.66\" (88.9x143.8mm)\u003c\/li\u003e \u003cli\u003e4 adhesive-based locking PCB supports\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eApplications \u003cul\u003e \u003cli\u003eVideo and audio processing\u003c\/li\u003e \u003cli\u003eSecurity and surveillance\u003c\/li\u003e \u003cli\u003eReal-time networking\u003c\/li\u003e \u003cli\u003eEdge computing \/ AI\u003c\/li\u003e \u003cli\u003eZynq-7000 evaluation and prototyping\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331947409493,"sku":"18099:DEV-18099:spark","price":44110.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/18099-piSmasher_Single-board_Computer.jpg?v=1663615289"},{"product_id":"sparkfun-snickerdoodle-black-connectors-up","title":"SparkFun Snickerdoodle Black (Connectors Up)","description":"\u003cp\u003ekrtklâ��s Snickerdoodle Black system-on-module (SoM) is a Zynq-based computer module with dual-band Wi-Fi, BLE, 1GB RAM, 16MB flash, 180 I\/O, an SD card cage, and is the size of a business card. Built on a Xilinx® Zynqâ�¢-7020 system-on-chip (SoC) and a Texas Instruments WiLinkâ�¢ 8 wireless module, Snickerdoodle is designed to make high-performance, power-efficient computing and artificial intelligence (AI) at the network edge practical, affordable, and scalable.\u003c\/p\u003e \u003cp\u003eThe 2.0\" x 3.5\" (50.8mm x 88.9mm) board offers a Zynq SoC with two 866MHz Arm® Cortex®-A9 cores and a 1.3M gate Xilinx Artix®-7 field-programmable gate array (FPGA), dual-band Wi-Fi and BLUETOOTH® Low Energy connectivity, 1GByte of LPDDR2 RAM, 125 reconfigurable FPGA inputs\/outputs (I\/O), and 55 additional I\/O pins. Out of the box, Snickerdoodle supports Ubuntu Linux, Python, PYNQ, C\/C++, and bare metal. Every Snickerdoodle black includes an adhesive-backed copper heat sink.\u003c\/p\u003e \u003cp\u003eSnickerdoodle Black is offered in two variants for design flexibility: The Connectors Down variant (DEV-18098) features bottom-mounted headers, while the Connectors Up variant (DEV-18100) features top-mounted headers.\u003c\/p\u003e \u003cp\u003e\u003cstrong\u003eFeatures:\u003c\/strong\u003e\u003c\/p\u003e \u003cul\u003e \u003cli\u003eSoC \u003cul\u003e \u003cli\u003eXilinx Zynq-7020 (XC7Z020-3CLG400E) \u003cul\u003e \u003cli\u003e866MHz 32-bit Dual-Core ARM Cortex-A9 \u003cul\u003e \u003cli\u003e640kB Cache\u003c\/li\u003e \u003cli\u003e2x 128-bit NEON Coprocessors\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eArtix-7 FPGA \u003cul\u003e \u003cli\u003e85K logic cells\u003c\/li\u003e \u003cli\u003e1.3M ASIC gates\u003c\/li\u003e \u003cli\u003e53,200 LUT-6s\u003c\/li\u003e \u003cli\u003e220 DSP slices\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eMemory \u003cul\u003e \u003cli\u003e1GB LPDDR2 SDRAM\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eStorage \u003cul\u003e \u003cli\u003e16MB XIP NOR Flash\u003c\/li\u003e \u003cli\u003eUp to 200GB SDIO NAND via Captive MicroSD Card Cage\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eUser I\/O \u003cul\u003e \u003cli\u003e180 I\/O pins (270 total pins, including grounds) \u003cul\u003e \u003cli\u003e125 reconfigurable FPGA I\/O\u003c\/li\u003e \u003cli\u003e55 additional I\/O (including 33x GPIO, 4x I2S Audio, 14x I2C, 1x ADC, 2x DAC)\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eCommunications \u003cul\u003e \u003cli\u003eDual-Band 150Mbps 2Ã�2 MIMO 2.4GHz\/5GHz 802.11n Wi-Fi\u003c\/li\u003e \u003cli\u003eBluetooth Low Energy\u003c\/li\u003e \u003cli\u003eDual-Band chip antenna, switched U.FL ports\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eSerial Interfaces \u003cul\u003e \u003cli\u003e2x Gigabit Ethernet\u003c\/li\u003e \u003cli\u003e2x CAN\u003c\/li\u003e \u003cli\u003e2x I2C\u003c\/li\u003e \u003cli\u003eSPI\u003c\/li\u003e \u003cli\u003eUART\u003c\/li\u003e \u003cli\u003eUSB 2.0 High-Speed\u003c\/li\u003e \u003cli\u003eMicroUSB Console\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAnalog Interfaces \u003cul\u003e \u003cli\u003e2x 1MSPS 12-bit ADCs w\/16 Channel Multiplexer\u003c\/li\u003e \u003cli\u003e2x 1MSPS 12-bit DACs\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eAdditional Interfaces, Peripherals \u003cul\u003e \u003cli\u003e5x LEDs\u003c\/li\u003e \u003cli\u003e2x Pushbuttons\u003c\/li\u003e \u003cli\u003eSecure Cryptographic Key\/Certificate Storage\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eMechanical \u003cul\u003e \u003cli\u003e2.0\" x 3.5\" (88.9mm x 50.8mm)\u003c\/li\u003e \u003cli\u003eCustom copper, adhesive-backed, pin-fin heat sink\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003ePower \u003cul\u003e \u003cli\u003e5V via MicroUSB or 3.7V to 17V via Power Pins\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eOperating Temperature \u003cul\u003e \u003cli\u003e0º to +80°C (+32° to +176°F)\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003cli\u003eSoftware Support \u003cul\u003e \u003cli\u003eUbuntu Linux\u003c\/li\u003e \u003cli\u003ePYNQ\u003c\/li\u003e \u003cli\u003ePython, C\/C++, Java, LISP\u003c\/li\u003e \u003cli\u003eBare metal\u003c\/li\u003e \u003c\/ul\u003e\n\u003c\/li\u003e \u003c\/ul\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":40331947442261,"sku":"18100:DEV-18100:spark","price":44110.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/products\/18100-Snickerdoodle_Black__Connectors_Up.jpg?v=1663615291"},{"product_id":"sipeed-tang-primer-25k","title":"Sipeed Tang Primer 25K","description":"\u003cp\u003eSmall and cost effective FPGA board from Sipeed.\u003c\/p\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cul\u003e \n   \u003cli\u003eFPGA: GW5A-LV25MG121\u003c\/li\u003e \n   \u003cli\u003eLogic Unit (LUT4) - 23040\u003c\/li\u003e \n   \u003cli\u003eRegister (FF) - 23040\u003c\/li\u003e \n   \u003cli\u003eDistributed Static Random Access Memory S-SRAM (bits) - 180K\u003c\/li\u003e \n   \u003cli\u003eBlock Static Random Access Memory B-SRAM (bits) - 1008K\u003c\/li\u003e \n   \u003cli\u003eNumber of Block Static Random Access Memory B-SRAM - 56\u003c\/li\u003e \n   \u003cli\u003eMultiplier (18x18 Multiplier) - 28\u003c\/li\u003e \n   \u003cli\u003ePhase-Locked Loop (PLLs) - 6\u003c\/li\u003e \n   \u003cli\u003eTotal I\/O Bank - 8\u003c\/li\u003e \n   \u003cli\u003eFlash: 64Mbits NOR Flash \u003c\/li\u003e \n   \u003cli\u003eOverall Packaging: 2x60P BTB Core Board \u003c\/li\u003e \n   \u003cli\u003eGeneral I\/O - 75 \u003c\/li\u003e \n   \u003cli\u003eMIPI I\/O - 4 Lane Data \u003c\/li\u003e \n  \u003c\/ul\u003e \n  \u003cp\u003eBoard Specs:\u003c\/p\u003e \n  \u003cul\u003e \n   \u003cli\u003eDebugger: Onboard high-speed debugger, supports JTAG+UART, uses USB-C port for programming \u003c\/li\u003e \n   \u003cli\u003eUSB-A Port: One, can be used as a USB1.1 Host to connect game controllers and other HID devices \u003c\/li\u003e \n   \u003cli\u003eI\/O Pins: One 2x20Pin 2.54 pin, Can support SDRAM module\u003c\/li\u003e \n   \u003cli\u003ePMOD Ports: 3 \u003c\/li\u003e \n   \u003cli\u003eButtons: 2 \u003c\/li\u003e \n   \u003cli\u003eDimensions: 64x40mm\u003c\/li\u003e \n  \u003c\/ul\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cul\u003e \n   \u003cli\u003eFPGA: GW5A-LV25MG121\u003c\/li\u003e \n   \u003cli\u003eLogic Unit (LUT4) - 23040\u003c\/li\u003e \n   \u003cli\u003eRegister (FF) - 23040\u003c\/li\u003e \n   \u003cli\u003eDistributed Static Random Access Memory S-SRAM (bits) - 180K\u003c\/li\u003e \n   \u003cli\u003eBlock Static Random Access Memory B-SRAM (bits) - 1008K\u003c\/li\u003e \n   \u003cli\u003eNumber of Block Static Random Access Memory B-SRAM - 56\u003c\/li\u003e \n   \u003cli\u003eMultiplier (18x18 Multiplier) - 28\u003c\/li\u003e \n   \u003cli\u003ePhase-Locked Loop (PLLs) - 6\u003c\/li\u003e \n   \u003cli\u003eTotal I\/O Bank - 8\u003c\/li\u003e \n   \u003cli\u003eFlash: 64Mbits NOR Flash \u003c\/li\u003e \n   \u003cli\u003eOverall Packaging: 2x60P BTB Core Board \u003c\/li\u003e \n   \u003cli\u003eGeneral I\/O - 75 \u003c\/li\u003e \n   \u003cli\u003eMIPI I\/O - 4 Lane Data \u003c\/li\u003e \n  \u003c\/ul\u003e \n  \u003cp\u003eBoard Specs:\u003c\/p\u003e \n  \u003cul\u003e \n   \u003cli\u003eDebugger: Onboard high-speed debugger, supports JTAG+UART, uses USB-C port for programming \u003c\/li\u003e \n   \u003cli\u003eUSB-A Port: One, can be used as a USB1.1 Host to connect game controllers and other HID devices \u003c\/li\u003e \n   \u003cli\u003eI\/O Pins: One 2x20Pin 2.54 pin, Can support SDRAM module\u003c\/li\u003e \n   \u003cli\u003ePMOD Ports: 3 \u003c\/li\u003e \n   \u003cli\u003eButtons: 2 \u003c\/li\u003e \n   \u003cli\u003eDimensions: 64x40mm\u003c\/li\u003e \n  \u003c\/ul\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e\n\u003ch2\u003eDocumentation\u003c\/h2\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cul\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/wiki.sipeed.com\/hardware\/en\/tang\/tang-primer-25k\/primer-25k.html#burn_flash\"\u003eApp Note on Downloading to External Flash\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/wiki.sipeed.com\/hardware\/en\/tang\/tang-primer-25k\/primer-25k.html\"\u003eWiki\/Datasheet\u003c\/a\u003e\u003c\/li\u003e \n\u003c\/ul\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cdiv\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cdiv\u003e \n     \u003cdiv\u003e \n      \u003cdiv\u003e \n       \u003cp\u003e\u003c\/p\u003e \n       \u003cdiv\u003e \n        \u003cspan\u003e \u003cb\u003eWARNING:\u003c\/b\u003e This product may contain chemicals known to the State of California to cause cancer and birth defects or other reproductive harm. See link below for more information. \u003ca href=\"https:\/\/www.P65Warnings.ca.gov\"\u003ewww.P65Warnings.ca.gov\u003c\/a\u003e \u003c\/span\u003e \n       \u003c\/div\u003e \n      \u003c\/div\u003e \n     \u003c\/div\u003e \n     \u003cdiv\u003e\u003c\/div\u003e \n    \u003c\/div\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42643625246805,"sku":"24511:DEV-24511:spark","price":6345.0,"currency_code":"INR","in_stock":false}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/files\/24511-Tang-Primer-25K-Kit-Feature.jpg?v=1782346052"},{"product_id":"alchitry-ft-v2","title":"Alchitry Ft V2","description":"\u003cp\u003eNeed to get a lot of data in or out of your design? Look no further than the Ft.\u003c\/p\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003ch2\u003eDocumentation\u003c\/h2\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cul\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/4\/3\/1\/c\/f\/FtSchematic.pdf\" target=\"_blank\" rel=\"noopener\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.alchitry.com\/docs\/Ft-V2\/Ft.step\" target=\"_blank\" rel=\"noopener noreferrer\"\u003e3D Model (Ft, STEP)\u003c\/a\u003e\u003c\/li\u003e \n\u003c\/ul\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cdiv\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cdiv\u003e \n     \u003cdiv\u003e \n      \u003cdiv\u003e \n       \u003cp\u003e\u003c\/p\u003e \n       \u003cdiv\u003e \n        \u003cspan\u003e \u003cb\u003eWARNING:\u003c\/b\u003e This product may contain chemicals known to the State of California to cause cancer and birth defects or other reproductive harm. See link below for more information. \u003ca href=\"https:\/\/www.P65Warnings.ca.gov\"\u003ewww.P65Warnings.ca.gov\u003c\/a\u003e \u003c\/span\u003e \n       \u003c\/div\u003e \n      \u003c\/div\u003e \n     \u003c\/div\u003e \n     \u003cdiv\u003e\u003c\/div\u003e \n    \u003c\/div\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42643809763413,"sku":"27880:DEV-27880:spark","price":6650.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/files\/DEV-27880-Alchitry-FtV2-Feature.jpg?v=1782357873"},{"product_id":"alchitry-ft-v2-1","title":"Alchitry Ft+ V2","description":"\u003cp\u003eNeed to get a lot of data in or out of your design? Look no further than the Ft+!\u003c\/p\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003ch2\u003eDocumentation\u003c\/h2\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cul\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/0\/4\/5\/1\/8\/FtPlusSchematic.pdf\" target=\"_blank\" rel=\"noopener\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.alchitry.com\/docs\/Ft-V2\/FtPlus.step\" target=\"_blank\" rel=\"noopener noreferrer\"\u003e3D Model (Ft+, STEP)\u003c\/a\u003e\u003c\/li\u003e \n\u003c\/ul\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cdiv\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cdiv\u003e \n     \u003cdiv\u003e \n      \u003cdiv\u003e \n       \u003cp\u003e\u003c\/p\u003e \n       \u003cdiv\u003e \n        \u003cspan\u003e \u003cb\u003eWARNING:\u003c\/b\u003e This product may contain chemicals known to the State of California to cause cancer and birth defects or other reproductive harm. See link below for more information. \u003ca href=\"https:\/\/www.P65Warnings.ca.gov\"\u003ewww.P65Warnings.ca.gov\u003c\/a\u003e \u003c\/span\u003e \n       \u003c\/div\u003e \n      \u003c\/div\u003e \n     \u003c\/div\u003e \n     \u003cdiv\u003e\u003c\/div\u003e \n    \u003c\/div\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42643840139349,"sku":"27881:DEV-27881:spark","price":7265.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/files\/27881-Alchitry-Ft_-V2-Feature.jpg?v=1782359018"},{"product_id":"alchitry-pt-v2","title":"Alchitry Pt V2","description":"\u003cp\u003eExperience platinum-tier performance with the Alchitry Pt V2, an FPGA board optimized for high-speed communication in a minimal footprint featuring the Xilinx Artix-7.\u003c\/p\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003eXC7A100T-2FGG84I FPGA\u003c\/li\u003e \n     \u003cli\u003eConnectors on both sides of the board allow two independent stacks (IO isn't shared)\u003c\/li\u003e \n     \u003cli\u003e206 IO pins \n      \u003cul\u003e \n       \u003cli\u003eAll IO pairs are LVDS_25 capable inputs or TMDS_33 capable IO\u003c\/li\u003e \n       \u003cli\u003e112 on the top \n        \u003cul\u003e \n         \u003cli\u003e32 triple voltage (3.3V, 2.5V, or 1.8V) pins (16 pairs) capable of LVDS_25 IO\u003c\/li\u003e \n         \u003cli\u003e76 routed as 100 ohm differential pairs\u003c\/li\u003e \n         \u003cli\u003eRemaining IO routed as 50 ohm single ended\u003c\/li\u003e \n         \u003cli\u003e8 are on the control header\u003c\/li\u003e \n        \u003c\/ul\u003e \u003c\/li\u003e \n       \u003cli\u003e92 on the bottom \n        \u003cul\u003e \n         \u003cli\u003e24 routed as 100 ohm differential pairs\u003c\/li\u003e \n         \u003cli\u003eRemaining IO routed as 50 ohm single ended\u003c\/li\u003e \n         \u003cli\u003e8 are on the control header\u003c\/li\u003e \n        \u003c\/ul\u003e \u003c\/li\u003e \n       \u003cli\u003e2 on QWIIC connector\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003e20 GTP pins broken out on the bottom \n      \u003cul\u003e \n       \u003cli\u003e2 clock input pairs\u003c\/li\u003e \n       \u003cli\u003e4 Tx pairs\u003c\/li\u003e \n       \u003cli\u003e4 Rx pairs\u003c\/li\u003e \n       \u003cli\u003e6.25 Gb\/s bandwidth per pair\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003e100MHz oscillator\u003c\/li\u003e \n     \u003cli\u003e8 general purpose LEDs\u003c\/li\u003e \n     \u003cli\u003e1 button (typically used as reset)\u003c\/li\u003e \n     \u003cli\u003e256MB DDR3L @ 800Mb\/s (400MHz)\u003c\/li\u003e \n     \u003cli\u003e32MBit Configuration FLASH\u003c\/li\u003e \n     \u003cli\u003eFT2232HQ USB -\u0026gt; JTAG and USB -\u0026gt; UART (12Mbaud max) or FIFO (~8MB\/s)\u003c\/li\u003e \n     \u003cli\u003e5-12V input voltage on-board power supply \n      \u003cul\u003e \n       \u003cli\u003e3.3V @ 4A (IO)\u003c\/li\u003e \n       \u003cli\u003e2.5V @ 500mA (triple voltage pins, derived from 3.3V)\u003c\/li\u003e \n       \u003cli\u003e1V @ 4A (VCCINT)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 1.2A (VCCAUX, triple voltage pins)\u003c\/li\u003e \n       \u003cli\u003e1.35V @1.2A (DDR3L)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 200mA (analog)\u003c\/li\u003e \n       \u003cli\u003e1V @ 1.5A (MGTAVCC, derived from 3.3V)\u003c\/li\u003e \n       \u003cli\u003e1.2V @1.5A (MGTAVTT, derived from 3.3V)\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003eXC7A100T-2FGG84I FPGA\u003c\/li\u003e \n     \u003cli\u003eConnectors on both sides of the board allow two independent stacks (IO isn't shared)\u003c\/li\u003e \n     \u003cli\u003e206 IO pins \n      \u003cul\u003e \n       \u003cli\u003eAll IO pairs are LVDS_25 capable inputs or TMDS_33 capable IO\u003c\/li\u003e \n       \u003cli\u003e112 on the top \n        \u003cul\u003e \n         \u003cli\u003e32 triple voltage (3.3V, 2.5V, or 1.8V) pins (16 pairs) capable of LVDS_25 IO\u003c\/li\u003e \n         \u003cli\u003e76 routed as 100 ohm differential pairs\u003c\/li\u003e \n         \u003cli\u003eRemaining IO routed as 50 ohm single ended\u003c\/li\u003e \n         \u003cli\u003e8 are on the control header\u003c\/li\u003e \n        \u003c\/ul\u003e \u003c\/li\u003e \n       \u003cli\u003e92 on the bottom \n        \u003cul\u003e \n         \u003cli\u003e24 routed as 100 ohm differential pairs\u003c\/li\u003e \n         \u003cli\u003eRemaining IO routed as 50 ohm single ended\u003c\/li\u003e \n         \u003cli\u003e8 are on the control header\u003c\/li\u003e \n        \u003c\/ul\u003e \u003c\/li\u003e \n       \u003cli\u003e2 on QWIIC connector\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003e20 GTP pins broken out on the bottom \n      \u003cul\u003e \n       \u003cli\u003e2 clock input pairs\u003c\/li\u003e \n       \u003cli\u003e4 Tx pairs\u003c\/li\u003e \n       \u003cli\u003e4 Rx pairs\u003c\/li\u003e \n       \u003cli\u003e6.25 Gb\/s bandwidth per pair\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003e100MHz oscillator\u003c\/li\u003e \n     \u003cli\u003e8 general purpose LEDs\u003c\/li\u003e \n     \u003cli\u003e1 button (typically used as reset)\u003c\/li\u003e \n     \u003cli\u003e256MB DDR3L @ 800Mb\/s (400MHz)\u003c\/li\u003e \n     \u003cli\u003e32MBit Configuration FLASH\u003c\/li\u003e \n     \u003cli\u003eFT2232HQ USB -\u0026gt; JTAG and USB -\u0026gt; UART (12Mbaud max) or FIFO (~8MB\/s)\u003c\/li\u003e \n     \u003cli\u003e5-12V input voltage on-board power supply \n      \u003cul\u003e \n       \u003cli\u003e3.3V @ 4A (IO)\u003c\/li\u003e \n       \u003cli\u003e2.5V @ 500mA (triple voltage pins, derived from 3.3V)\u003c\/li\u003e \n       \u003cli\u003e1V @ 4A (VCCINT)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 1.2A (VCCAUX, triple voltage pins)\u003c\/li\u003e \n       \u003cli\u003e1.35V @1.2A (DDR3L)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 200mA (analog)\u003c\/li\u003e \n       \u003cli\u003e1V @ 1.5A (MGTAVCC, derived from 3.3V)\u003c\/li\u003e \n       \u003cli\u003e1.2V @1.5A (MGTAVTT, derived from 3.3V)\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003ch2\u003eDocumentation\u003c\/h2\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cul\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.alchitry.com\/docs\/Pt-V2\/Alchitry%20Platinum%20Rev%20A.pdf\" target=\"_blank\" rel=\"noopener\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.alchitry.com\/docs\/Pt-V2\/Alchitry%20Platinum%20v2.step\" target=\"_blank\" rel=\"noopener\"\u003e3D Model (STEP)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/v\/u\/en-US\/ds181_Artix_7_Data_Sheet\" target=\"_blank\" rel=\"noopener\"\u003eDC and AC Switching Characteristics (DS181)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/v\/u\/en-US\/ug471_7Series_SelectIO\" target=\"_blank\" rel=\"noopener\"\u003eSelectIO Resources (UG471)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/v\/u\/en-US\/ug472_7Series_Clocking\" target=\"_blank\" rel=\"noopener\"\u003eClocking Resources (UG472)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/search\/documents?filters=Product_custom~%2522Adaptive+SoCs+%2526+FPGAs%257CFPGA%257CArtix+7%2522\u0026amp;content-lang=en-US\" target=\"_blank\" rel=\"noopener\"\u003eAll Xilinx Artix 7 Docs\u003c\/a\u003e\u003c\/li\u003e \n\u003c\/ul\u003e \n\u003cp\u003eThe Artix 7 FPGA requires a free license for Vivado. \u003ca href=\"https:\/\/alchitry.com\/tutorials\/setup\/vivado\/\" target=\"_blank\" rel=\"noopener\"\u003eClick here\u003c\/a\u003e for instructions on installing it.\u003c\/p\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cdiv\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cdiv\u003e \n     \u003cdiv\u003e \n      \u003cdiv\u003e \n       \u003cp\u003e\u003c\/p\u003e \n       \u003cdiv\u003e \n        \u003cspan\u003e \u003cb\u003eWARNING:\u003c\/b\u003e This product may contain chemicals known to the State of California to cause cancer and birth defects or other reproductive harm. See link below for more information. \u003ca href=\"https:\/\/www.P65Warnings.ca.gov\"\u003ewww.P65Warnings.ca.gov\u003c\/a\u003e \u003c\/span\u003e \n       \u003c\/div\u003e \n      \u003c\/div\u003e \n     \u003c\/div\u003e \n     \u003cdiv\u003e\u003c\/div\u003e \n    \u003c\/div\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42643899678805,"sku":"27873:DEV-27873:spark","price":58480.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/files\/27873-Alchitry-Pt-V2-Feature.jpg?v=1782359894"},{"product_id":"alchitry-io-v2","title":"Alchitry Io V2","description":"\u003cp\u003eThe Alchitry Io Element Board is the perfect way to get your feet wet with digital design.\u003c\/p\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003e4 Digit 7-Segment Display\u003c\/li\u003e \n     \u003cli\u003e5 Push Buttons\u003c\/li\u003e \n     \u003cli\u003e24 LEDs\u003c\/li\u003e \n     \u003cli\u003e3x8 DIP Switches\u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003e4 Digit 7-Segment Display\u003c\/li\u003e \n     \u003cli\u003e5 Push Buttons\u003c\/li\u003e \n     \u003cli\u003e24 LEDs\u003c\/li\u003e \n     \u003cli\u003e3x8 DIP Switches\u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003ch2\u003eDocumentation\u003c\/h2\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cul\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/f\/f\/c\/0\/e\/IoSchematic.pdf\" target=\"_blank\" rel=\"noopener\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.alchitry.com\/docs\/Io-V2\/Io.step\" target=\"_blank\" rel=\"noopener\"\u003e3D Model (STEP)\u003c\/a\u003e\u003c\/li\u003e \n\u003c\/ul\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cdiv\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cdiv\u003e \n     \u003cdiv\u003e \n      \u003cdiv\u003e \n       \u003cp\u003e\u003c\/p\u003e \n       \u003cdiv\u003e \n        \u003cspan\u003e \u003cb\u003eWARNING:\u003c\/b\u003e This product may contain chemicals known to the State of California to cause cancer and birth defects or other reproductive harm. See link below for more information. \u003ca href=\"https:\/\/www.P65Warnings.ca.gov\"\u003ewww.P65Warnings.ca.gov\u003c\/a\u003e \u003c\/span\u003e \n       \u003c\/div\u003e \n      \u003c\/div\u003e \n     \u003c\/div\u003e \n     \u003cdiv\u003e\u003c\/div\u003e \n    \u003c\/div\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42643907608661,"sku":"27878:DEV-27878:spark","price":3385.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/files\/27878-Alchitry-Io-V2-Feature.jpg?v=1782360071"},{"product_id":"alchitry-au-v2","title":"Alchitry Au V2","description":"\u003cp\u003eThe Alchitry Au V2 features an Artix 7 FPGA and is the gold standard for FPGA development boards. It's possibly one of the strongest boards of its type on the market.\u003c\/p\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003eXC7A35T-2FTG256I FPGA (speed and temperature grade upgrade over Au V1)\u003c\/li\u003e \n     \u003cli\u003e104 IO pins broken out across two headers \n      \u003cul\u003e \n       \u003cli\u003e22 are triple voltage (3.3V, 2.5V, or 1.8V) of which 20 are LVDS_25 capable outputs\u003c\/li\u003e \n       \u003cli\u003e44 pins are routed as 100 ohm differential pairs (includes 20 dual voltage pins)\u003c\/li\u003e \n       \u003cli\u003eRemaining IO routed as 50 ohm single ended (~90 ohm when used as diff pairs)\u003c\/li\u003e \n       \u003cli\u003e2 1.35V pins on bank B\u003c\/li\u003e \n       \u003cli\u003e8 pairs can be used as inputs to the XADC (0-1V input range)\u003c\/li\u003e \n       \u003cli\u003eRemaining IO is at 3.3V\u003c\/li\u003e \n       \u003cli\u003eAll pairs can be used as LVDS_25 inputs except three pairs on bank B\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003eControl Header \n      \u003cul\u003e \n       \u003cli\u003e8 IO pins also connected to on-board LEDs\u003c\/li\u003e \n       \u003cli\u003e1 IO pin also connected to on-board reset button\u003c\/li\u003e \n       \u003cli\u003eJTAG\u003c\/li\u003e \n       \u003cli\u003eAnalog voltages and dedicated XADC input (0-1V range)\u003c\/li\u003e \n       \u003cli\u003eRaw power input\/3.3V regulated output\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003eQWIIC connector (shares pins on bank B)\u003c\/li\u003e \n     \u003cli\u003e100MHz oscillator\u003c\/li\u003e \n     \u003cli\u003e8 general purpose LEDs\u003c\/li\u003e \n     \u003cli\u003e1 button (typically used as reset)\u003c\/li\u003e \n     \u003cli\u003e256MB DDR3L @ 800Mb\/s (400MHz)\u003c\/li\u003e \n     \u003cli\u003e32MBit Configuration FLASH\u003c\/li\u003e \n     \u003cli\u003eFT2232HQ USB -\u0026gt; JTAG and USB -\u0026gt; UART (12Mbaud max)\u003c\/li\u003e \n     \u003cli\u003e5-12V input voltage on-board power supply \n      \u003cul\u003e \n       \u003cli\u003e3.3V @ 4A (IO)\u003c\/li\u003e \n       \u003cli\u003e2.5V @ 500mA (tiple voltage pins, derived from 3.3V)\u003c\/li\u003e \n       \u003cli\u003e1V @ 4A (VCCINT)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 1.2A (VCCAUX, triple voltage pins)\u003c\/li\u003e \n       \u003cli\u003e1.35V @1.2A (DDR3L)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 200mA (analog)\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003eXC7A35T-2FTG256I FPGA (speed and temperature grade upgrade over Au V1)\u003c\/li\u003e \n     \u003cli\u003e104 IO pins broken out across two headers \n      \u003cul\u003e \n       \u003cli\u003e22 are triple voltage (3.3V, 2.5V, or 1.8V) of which 20 are LVDS_25 capable outputs\u003c\/li\u003e \n       \u003cli\u003e44 pins are routed as 100 ohm differential pairs (includes 20 dual voltage pins)\u003c\/li\u003e \n       \u003cli\u003eRemaining IO routed as 50 ohm single ended (~90 ohm when used as diff pairs)\u003c\/li\u003e \n       \u003cli\u003e2 1.35V pins on bank B\u003c\/li\u003e \n       \u003cli\u003e8 pairs can be used as inputs to the XADC (0-1V input range)\u003c\/li\u003e \n       \u003cli\u003eRemaining IO is at 3.3V\u003c\/li\u003e \n       \u003cli\u003eAll pairs can be used as LVDS_25 inputs except three pairs on bank B\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003eControl Header \n      \u003cul\u003e \n       \u003cli\u003e8 IO pins also connected to on-board LEDs\u003c\/li\u003e \n       \u003cli\u003e1 IO pin also connected to on-board reset button\u003c\/li\u003e \n       \u003cli\u003eJTAG\u003c\/li\u003e \n       \u003cli\u003eAnalog voltages and dedicated XADC input (0-1V range)\u003c\/li\u003e \n       \u003cli\u003eRaw power input\/3.3V regulated output\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n     \u003cli\u003eQWIIC connector (shares pins on bank B)\u003c\/li\u003e \n     \u003cli\u003e100MHz oscillator\u003c\/li\u003e \n     \u003cli\u003e8 general purpose LEDs\u003c\/li\u003e \n     \u003cli\u003e1 button (typically used as reset)\u003c\/li\u003e \n     \u003cli\u003e256MB DDR3L @ 800Mb\/s (400MHz)\u003c\/li\u003e \n     \u003cli\u003e32MBit Configuration FLASH\u003c\/li\u003e \n     \u003cli\u003eFT2232HQ USB -\u0026gt; JTAG and USB -\u0026gt; UART (12Mbaud max)\u003c\/li\u003e \n     \u003cli\u003e5-12V input voltage on-board power supply \n      \u003cul\u003e \n       \u003cli\u003e3.3V @ 4A (IO)\u003c\/li\u003e \n       \u003cli\u003e2.5V @ 500mA (tiple voltage pins, derived from 3.3V)\u003c\/li\u003e \n       \u003cli\u003e1V @ 4A (VCCINT)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 1.2A (VCCAUX, triple voltage pins)\u003c\/li\u003e \n       \u003cli\u003e1.35V @1.2A (DDR3L)\u003c\/li\u003e \n       \u003cli\u003e1.8V @ 200mA (analog)\u003c\/li\u003e \n      \u003c\/ul\u003e \u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003ch2\u003eDocumentation\u003c\/h2\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cul\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/2\/2\/e\/2\/1\/AuSchematic.pdf\" target=\"_blank\" rel=\"noopener\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.sparkfun.com\/assets\/3\/7\/6\/b\/9\/AuDrawing.pdf\" target=\"_blank\" rel=\"noopener\"\u003eDrawing\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.google.com\/spreadsheets\/d\/1WxeS5YJ1MgcgeiRLXJ_PuZC4l7f2cVPHpaNJcFdKyg8\/edit?usp=sharing\" target=\"_blank\" rel=\"noopener\"\u003ePinout and Trace Lengths\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.alchitry.com\/docs\/Au-V2\/Au.step\" target=\"_blank\" rel=\"noopener noreferrer\"\u003e3D Model (STEP)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/cdn.alchitry.com\/docs\/Au-V2\/AuSimple.step\" target=\"_blank\" rel=\"noopener noreferrer\"\u003eSimplified 3D Model (STEP)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/v\/u\/en-US\/ds181_Artix_7_Data_Sheet\" target=\"_blank\" rel=\"noopener noreferrer\"\u003eDC and AC Switching Characteristics (DS181)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/v\/u\/en-US\/ug471_7Series_SelectIO\" target=\"_blank\" rel=\"noopener noreferrer\"\u003eSelectIO Resources (UG471)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/v\/u\/en-US\/ug472_7Series_Clocking\" target=\"_blank\" rel=\"noopener noreferrer\"\u003eClocking Resources (UG472)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca href=\"https:\/\/docs.amd.com\/search\/documents?filters=Product_custom~%2522Adaptive+SoCs+%2526+FPGAs%257CFPGA%257CArtix+7%2522\u0026amp;content-lang=en-US\" target=\"_blank\" rel=\"noopener noreferrer\"\u003eAll Xilinx Artix 7 Docs\u003c\/a\u003e\u003c\/li\u003e \n\u003c\/ul\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cdiv\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cdiv\u003e \n     \u003cdiv\u003e \n      \u003cdiv\u003e \n       \u003cp\u003e\u003c\/p\u003e \n       \u003cdiv\u003e \n        \u003cspan\u003e \u003cb\u003eWARNING:\u003c\/b\u003e This product may contain chemicals known to the State of California to cause cancer and birth defects or other reproductive harm. See link below for more information. \u003ca href=\"https:\/\/www.P65Warnings.ca.gov\"\u003ewww.P65Warnings.ca.gov\u003c\/a\u003e \u003c\/span\u003e \n       \u003c\/div\u003e \n      \u003c\/div\u003e \n     \u003c\/div\u003e \n     \u003cdiv\u003e\u003c\/div\u003e \n    \u003c\/div\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42643949060181,"sku":"27874:DEV-27874:spark","price":23220.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/files\/DEV-27874-Alchitry-Au-V2-Feature.jpg?v=1782360568"},{"product_id":"alchitry-cu-v2","title":"Alchitry Cu V2","description":"\u003cp\u003eIf you don't need a lot of power to start your FPGA adventure, or are looking for a more economical option, the Alchitry Cu V2 is the perfect option, especially if you like the Lattice iCE40 HX!\u003c\/p\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003eLattice iCE40-HX8K FPGA - 7680 logic elements\u003c\/li\u003e \n     \u003cli\u003e79 IO pins (3.3V logic level)\u003c\/li\u003e \n     \u003cli\u003eUSB-C to configure and power the board\u003c\/li\u003e \n     \u003cli\u003eEight general purpose LEDs\u003c\/li\u003e \n     \u003cli\u003eOne button (typically used as a reset)\u003c\/li\u003e \n     \u003cli\u003e100MHz on-board clock (can be multiplied internally by the FPGA)\u003c\/li\u003e \n     \u003cli\u003ePowered with 5V through USB-C port, 0.1\" holes, or headers\u003c\/li\u003e \n     \u003cli\u003eUSB to serial interface for data transfer (up to 12Mbaud)\u003c\/li\u003e \n     \u003cli\u003eQwiic Connector\u003c\/li\u003e \n     \u003cli\u003eDimensions of 65mm x 45mm\u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003cdiv\u003e \n \u003ch2\u003eFeatures \u0026amp; Specs\u003c\/h2\u003e \n \u003cp\u003e\u003c\/p\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cul\u003e \n     \u003cli\u003eLattice iCE40-HX8K FPGA - 7680 logic elements\u003c\/li\u003e \n     \u003cli\u003e79 IO pins (3.3V logic level)\u003c\/li\u003e \n     \u003cli\u003eUSB-C to configure and power the board\u003c\/li\u003e \n     \u003cli\u003eEight general purpose LEDs\u003c\/li\u003e \n     \u003cli\u003eOne button (typically used as a reset)\u003c\/li\u003e \n     \u003cli\u003e100MHz on-board clock (can be multiplied internally by the FPGA)\u003c\/li\u003e \n     \u003cli\u003ePowered with 5V through USB-C port, 0.1\" holes, or headers\u003c\/li\u003e \n     \u003cli\u003eUSB to serial interface for data transfer (up to 12Mbaud)\u003c\/li\u003e \n     \u003cli\u003eQwiic Connector\u003c\/li\u003e \n     \u003cli\u003eDimensions of 65mm x 45mm\u003c\/li\u003e \n    \u003c\/ul\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n \u003cp\u003e\u003c\/p\u003e \n\u003c\/div\u003e\n\u003ch2\u003eDocumentation\u003c\/h2\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cul\u003e \n \u003cli\u003e\u003ca title=\"Cu Schematic\" href=\"https:\/\/cdn.sparkfun.com\/assets\/2\/f\/9\/9\/3\/CuSchematic.pdf\" target=\"_blank\" rel=\"noopener\"\u003eSchematic\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca title=\"3D Model\" href=\"https:\/\/cdn.alchitry.com\/docs\/Cu-V2\/Cu.step\" target=\"_blank\" rel=\"noopener\"\u003e3D Model (STEP)\u003c\/a\u003e\u003c\/li\u003e \n \u003cli\u003e\u003ca title=\"3D Model\" href=\"https:\/\/cdn.alchitry.com\/docs\/Cu-V2\/CuSimple.step\" target=\"_blank\" rel=\"noopener\"\u003eSimplified 3D Model (STEP)\u003c\/a\u003e\u003c\/li\u003e \n\u003c\/ul\u003e \n\u003cp\u003e\u003c\/p\u003e \n\u003cdiv\u003e \n \u003cdiv\u003e \n  \u003cdiv\u003e \n   \u003cdiv\u003e \n    \u003cdiv\u003e \n     \u003cdiv\u003e \n      \u003cdiv\u003e \n       \u003cp\u003e\u003c\/p\u003e \n       \u003cdiv\u003e \n        \u003cspan\u003e \u003cb\u003eWARNING:\u003c\/b\u003e This product may contain chemicals known to the State of California to cause cancer and birth defects or other reproductive harm. See link below for more information. \u003ca href=\"https:\/\/www.P65Warnings.ca.gov\"\u003ewww.P65Warnings.ca.gov\u003c\/a\u003e \u003c\/span\u003e \n       \u003c\/div\u003e \n      \u003c\/div\u003e \n     \u003c\/div\u003e \n     \u003cdiv\u003e\u003c\/div\u003e \n    \u003c\/div\u003e \n   \u003c\/div\u003e \n  \u003c\/div\u003e \n \u003c\/div\u003e \n\u003c\/div\u003e","brand":"sparkfun-10","offers":[{"title":"Default Title","offer_id":42643966230613,"sku":"27875:DEV-27875:spark","price":9450.0,"currency_code":"INR","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1034\/1611\/files\/27875-Alchitry-Cu-V2-Feature.jpg?v=1782361402"}],"url":"https:\/\/www.tanotis.com\/collections\/fpga.oembed","provider":"Tanotis","version":"1.0","type":"link"}